#include "m68kcpu.h" | |
/* ======================================================================== */ | |
/* ========================= INSTRUCTION HANDLERS ========================= */ | |
/* ======================================================================== */ | |
void m68k_op_dbt_16(void) | |
{ | |
REG_PC += 2; | |
} | |
void m68k_op_dbf_16(void) | |
{ | |
uint* r_dst = &DY; | |
uint res = MASK_OUT_ABOVE_16(*r_dst - 1); | |
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res; | |
if(res != 0xffff) | |
{ | |
uint offset = OPER_I_16(); | |
REG_PC -= 2; | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
m68ki_branch_16(offset); | |
return; | |
} | |
REG_PC += 2; | |
} | |
void m68k_op_dbhi_16(void) | |
{ | |
if(COND_NOT_HI()) | |
{ | |
uint* r_dst = &DY; | |
uint res = MASK_OUT_ABOVE_16(*r_dst - 1); | |
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res; | |
if(res != 0xffff) | |
{ | |
uint offset = OPER_I_16(); | |
REG_PC -= 2; | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
m68ki_branch_16(offset); | |
USE_CYCLES(CYC_DBCC_F_NOEXP); | |
return; | |
} | |
REG_PC += 2; | |
USE_CYCLES(CYC_DBCC_F_EXP); | |
return; | |
} | |
REG_PC += 2; | |
} | |
void m68k_op_dbls_16(void) | |
{ | |
if(COND_NOT_LS()) | |
{ | |
uint* r_dst = &DY; | |
uint res = MASK_OUT_ABOVE_16(*r_dst - 1); | |
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res; | |
if(res != 0xffff) | |
{ | |
uint offset = OPER_I_16(); | |
REG_PC -= 2; | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
m68ki_branch_16(offset); | |
USE_CYCLES(CYC_DBCC_F_NOEXP); | |
return; | |
} | |
REG_PC += 2; | |
USE_CYCLES(CYC_DBCC_F_EXP); | |
return; | |
} | |
REG_PC += 2; | |
} | |
void m68k_op_dbcc_16(void) | |
{ | |
if(COND_NOT_CC()) | |
{ | |
uint* r_dst = &DY; | |
uint res = MASK_OUT_ABOVE_16(*r_dst - 1); | |
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res; | |
if(res != 0xffff) | |
{ | |
uint offset = OPER_I_16(); | |
REG_PC -= 2; | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
m68ki_branch_16(offset); | |
USE_CYCLES(CYC_DBCC_F_NOEXP); | |
return; | |
} | |
REG_PC += 2; | |
USE_CYCLES(CYC_DBCC_F_EXP); | |
return; | |
} | |
REG_PC += 2; | |
} | |
void m68k_op_dbcs_16(void) | |
{ | |
if(COND_NOT_CS()) | |
{ | |
uint* r_dst = &DY; | |
uint res = MASK_OUT_ABOVE_16(*r_dst - 1); | |
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res; | |
if(res != 0xffff) | |
{ | |
uint offset = OPER_I_16(); | |
REG_PC -= 2; | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
m68ki_branch_16(offset); | |
USE_CYCLES(CYC_DBCC_F_NOEXP); | |
return; | |
} | |
REG_PC += 2; | |
USE_CYCLES(CYC_DBCC_F_EXP); | |
return; | |
} | |
REG_PC += 2; | |
} | |
void m68k_op_dbne_16(void) | |
{ | |
if(COND_NOT_NE()) | |
{ | |
uint* r_dst = &DY; | |
uint res = MASK_OUT_ABOVE_16(*r_dst - 1); | |
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res; | |
if(res != 0xffff) | |
{ | |
uint offset = OPER_I_16(); | |
REG_PC -= 2; | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
m68ki_branch_16(offset); | |
USE_CYCLES(CYC_DBCC_F_NOEXP); | |
return; | |
} | |
REG_PC += 2; | |
USE_CYCLES(CYC_DBCC_F_EXP); | |
return; | |
} | |
REG_PC += 2; | |
} | |
void m68k_op_dbeq_16(void) | |
{ | |
if(COND_NOT_EQ()) | |
{ | |
uint* r_dst = &DY; | |
uint res = MASK_OUT_ABOVE_16(*r_dst - 1); | |
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res; | |
if(res != 0xffff) | |
{ | |
uint offset = OPER_I_16(); | |
REG_PC -= 2; | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
m68ki_branch_16(offset); | |
USE_CYCLES(CYC_DBCC_F_NOEXP); | |
return; | |
} | |
REG_PC += 2; | |
USE_CYCLES(CYC_DBCC_F_EXP); | |
return; | |
} | |
REG_PC += 2; | |
} | |
void m68k_op_dbvc_16(void) | |
{ | |
if(COND_NOT_VC()) | |
{ | |
uint* r_dst = &DY; | |
uint res = MASK_OUT_ABOVE_16(*r_dst - 1); | |
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res; | |
if(res != 0xffff) | |
{ | |
uint offset = OPER_I_16(); | |
REG_PC -= 2; | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
m68ki_branch_16(offset); | |
USE_CYCLES(CYC_DBCC_F_NOEXP); | |
return; | |
} | |
REG_PC += 2; | |
USE_CYCLES(CYC_DBCC_F_EXP); | |
return; | |
} | |
REG_PC += 2; | |
} | |
void m68k_op_dbvs_16(void) | |
{ | |
if(COND_NOT_VS()) | |
{ | |
uint* r_dst = &DY; | |
uint res = MASK_OUT_ABOVE_16(*r_dst - 1); | |
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res; | |
if(res != 0xffff) | |
{ | |
uint offset = OPER_I_16(); | |
REG_PC -= 2; | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
m68ki_branch_16(offset); | |
USE_CYCLES(CYC_DBCC_F_NOEXP); | |
return; | |
} | |
REG_PC += 2; | |
USE_CYCLES(CYC_DBCC_F_EXP); | |
return; | |
} | |
REG_PC += 2; | |
} | |
void m68k_op_dbpl_16(void) | |
{ | |
if(COND_NOT_PL()) | |
{ | |
uint* r_dst = &DY; | |
uint res = MASK_OUT_ABOVE_16(*r_dst - 1); | |
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res; | |
if(res != 0xffff) | |
{ | |
uint offset = OPER_I_16(); | |
REG_PC -= 2; | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
m68ki_branch_16(offset); | |
USE_CYCLES(CYC_DBCC_F_NOEXP); | |
return; | |
} | |
REG_PC += 2; | |
USE_CYCLES(CYC_DBCC_F_EXP); | |
return; | |
} | |
REG_PC += 2; | |
} | |
void m68k_op_dbmi_16(void) | |
{ | |
if(COND_NOT_MI()) | |
{ | |
uint* r_dst = &DY; | |
uint res = MASK_OUT_ABOVE_16(*r_dst - 1); | |
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res; | |
if(res != 0xffff) | |
{ | |
uint offset = OPER_I_16(); | |
REG_PC -= 2; | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
m68ki_branch_16(offset); | |
USE_CYCLES(CYC_DBCC_F_NOEXP); | |
return; | |
} | |
REG_PC += 2; | |
USE_CYCLES(CYC_DBCC_F_EXP); | |
return; | |
} | |
REG_PC += 2; | |
} | |
void m68k_op_dbge_16(void) | |
{ | |
if(COND_NOT_GE()) | |
{ | |
uint* r_dst = &DY; | |
uint res = MASK_OUT_ABOVE_16(*r_dst - 1); | |
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res; | |
if(res != 0xffff) | |
{ | |
uint offset = OPER_I_16(); | |
REG_PC -= 2; | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
m68ki_branch_16(offset); | |
USE_CYCLES(CYC_DBCC_F_NOEXP); | |
return; | |
} | |
REG_PC += 2; | |
USE_CYCLES(CYC_DBCC_F_EXP); | |
return; | |
} | |
REG_PC += 2; | |
} | |
void m68k_op_dblt_16(void) | |
{ | |
if(COND_NOT_LT()) | |
{ | |
uint* r_dst = &DY; | |
uint res = MASK_OUT_ABOVE_16(*r_dst - 1); | |
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res; | |
if(res != 0xffff) | |
{ | |
uint offset = OPER_I_16(); | |
REG_PC -= 2; | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
m68ki_branch_16(offset); | |
USE_CYCLES(CYC_DBCC_F_NOEXP); | |
return; | |
} | |
REG_PC += 2; | |
USE_CYCLES(CYC_DBCC_F_EXP); | |
return; | |
} | |
REG_PC += 2; | |
} | |
void m68k_op_dbgt_16(void) | |
{ | |
if(COND_NOT_GT()) | |
{ | |
uint* r_dst = &DY; | |
uint res = MASK_OUT_ABOVE_16(*r_dst - 1); | |
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res; | |
if(res != 0xffff) | |
{ | |
uint offset = OPER_I_16(); | |
REG_PC -= 2; | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
m68ki_branch_16(offset); | |
USE_CYCLES(CYC_DBCC_F_NOEXP); | |
return; | |
} | |
REG_PC += 2; | |
USE_CYCLES(CYC_DBCC_F_EXP); | |
return; | |
} | |
REG_PC += 2; | |
} | |
void m68k_op_dble_16(void) | |
{ | |
if(COND_NOT_LE()) | |
{ | |
uint* r_dst = &DY; | |
uint res = MASK_OUT_ABOVE_16(*r_dst - 1); | |
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res; | |
if(res != 0xffff) | |
{ | |
uint offset = OPER_I_16(); | |
REG_PC -= 2; | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
m68ki_branch_16(offset); | |
USE_CYCLES(CYC_DBCC_F_NOEXP); | |
return; | |
} | |
REG_PC += 2; | |
USE_CYCLES(CYC_DBCC_F_EXP); | |
return; | |
} | |
REG_PC += 2; | |
} | |
void m68k_op_divs_16_d(void) | |
{ | |
uint* r_dst = &DX; | |
sint src = MAKE_INT_16(DY); | |
sint quotient; | |
sint remainder; | |
if(src != 0) | |
{ | |
if((uint32)*r_dst == 0x80000000 && src == -1) | |
{ | |
FLAG_Z = 0; | |
FLAG_N = NFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
*r_dst = 0; | |
return; | |
} | |
quotient = MAKE_INT_32(*r_dst) / src; | |
remainder = MAKE_INT_32(*r_dst) % src; | |
if(quotient == MAKE_INT_16(quotient)) | |
{ | |
FLAG_Z = quotient; | |
FLAG_N = NFLAG_16(quotient); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
*r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); | |
return; | |
} | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
} | |
void m68k_op_divs_16_ai(void) | |
{ | |
uint* r_dst = &DX; | |
sint src = MAKE_INT_16(OPER_AY_AI_16()); | |
sint quotient; | |
sint remainder; | |
if(src != 0) | |
{ | |
if((uint32)*r_dst == 0x80000000 && src == -1) | |
{ | |
FLAG_Z = 0; | |
FLAG_N = NFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
*r_dst = 0; | |
return; | |
} | |
quotient = MAKE_INT_32(*r_dst) / src; | |
remainder = MAKE_INT_32(*r_dst) % src; | |
if(quotient == MAKE_INT_16(quotient)) | |
{ | |
FLAG_Z = quotient; | |
FLAG_N = NFLAG_16(quotient); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
*r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); | |
return; | |
} | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
} | |
void m68k_op_divs_16_pi(void) | |
{ | |
uint* r_dst = &DX; | |
sint src = MAKE_INT_16(OPER_AY_PI_16()); | |
sint quotient; | |
sint remainder; | |
if(src != 0) | |
{ | |
if((uint32)*r_dst == 0x80000000 && src == -1) | |
{ | |
FLAG_Z = 0; | |
FLAG_N = NFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
*r_dst = 0; | |
return; | |
} | |
quotient = MAKE_INT_32(*r_dst) / src; | |
remainder = MAKE_INT_32(*r_dst) % src; | |
if(quotient == MAKE_INT_16(quotient)) | |
{ | |
FLAG_Z = quotient; | |
FLAG_N = NFLAG_16(quotient); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
*r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); | |
return; | |
} | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
} | |
void m68k_op_divs_16_pd(void) | |
{ | |
uint* r_dst = &DX; | |
sint src = MAKE_INT_16(OPER_AY_PD_16()); | |
sint quotient; | |
sint remainder; | |
if(src != 0) | |
{ | |
if((uint32)*r_dst == 0x80000000 && src == -1) | |
{ | |
FLAG_Z = 0; | |
FLAG_N = NFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
*r_dst = 0; | |
return; | |
} | |
quotient = MAKE_INT_32(*r_dst) / src; | |
remainder = MAKE_INT_32(*r_dst) % src; | |
if(quotient == MAKE_INT_16(quotient)) | |
{ | |
FLAG_Z = quotient; | |
FLAG_N = NFLAG_16(quotient); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
*r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); | |
return; | |
} | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
} | |
void m68k_op_divs_16_di(void) | |
{ | |
uint* r_dst = &DX; | |
sint src = MAKE_INT_16(OPER_AY_DI_16()); | |
sint quotient; | |
sint remainder; | |
if(src != 0) | |
{ | |
if((uint32)*r_dst == 0x80000000 && src == -1) | |
{ | |
FLAG_Z = 0; | |
FLAG_N = NFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
*r_dst = 0; | |
return; | |
} | |
quotient = MAKE_INT_32(*r_dst) / src; | |
remainder = MAKE_INT_32(*r_dst) % src; | |
if(quotient == MAKE_INT_16(quotient)) | |
{ | |
FLAG_Z = quotient; | |
FLAG_N = NFLAG_16(quotient); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
*r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); | |
return; | |
} | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
} | |
void m68k_op_divs_16_ix(void) | |
{ | |
uint* r_dst = &DX; | |
sint src = MAKE_INT_16(OPER_AY_IX_16()); | |
sint quotient; | |
sint remainder; | |
if(src != 0) | |
{ | |
if((uint32)*r_dst == 0x80000000 && src == -1) | |
{ | |
FLAG_Z = 0; | |
FLAG_N = NFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
*r_dst = 0; | |
return; | |
} | |
quotient = MAKE_INT_32(*r_dst) / src; | |
remainder = MAKE_INT_32(*r_dst) % src; | |
if(quotient == MAKE_INT_16(quotient)) | |
{ | |
FLAG_Z = quotient; | |
FLAG_N = NFLAG_16(quotient); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
*r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); | |
return; | |
} | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
} | |
void m68k_op_divs_16_aw(void) | |
{ | |
uint* r_dst = &DX; | |
sint src = MAKE_INT_16(OPER_AW_16()); | |
sint quotient; | |
sint remainder; | |
if(src != 0) | |
{ | |
if((uint32)*r_dst == 0x80000000 && src == -1) | |
{ | |
FLAG_Z = 0; | |
FLAG_N = NFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
*r_dst = 0; | |
return; | |
} | |
quotient = MAKE_INT_32(*r_dst) / src; | |
remainder = MAKE_INT_32(*r_dst) % src; | |
if(quotient == MAKE_INT_16(quotient)) | |
{ | |
FLAG_Z = quotient; | |
FLAG_N = NFLAG_16(quotient); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
*r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); | |
return; | |
} | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
} | |
void m68k_op_divs_16_al(void) | |
{ | |
uint* r_dst = &DX; | |
sint src = MAKE_INT_16(OPER_AL_16()); | |
sint quotient; | |
sint remainder; | |
if(src != 0) | |
{ | |
if((uint32)*r_dst == 0x80000000 && src == -1) | |
{ | |
FLAG_Z = 0; | |
FLAG_N = NFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
*r_dst = 0; | |
return; | |
} | |
quotient = MAKE_INT_32(*r_dst) / src; | |
remainder = MAKE_INT_32(*r_dst) % src; | |
if(quotient == MAKE_INT_16(quotient)) | |
{ | |
FLAG_Z = quotient; | |
FLAG_N = NFLAG_16(quotient); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
*r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); | |
return; | |
} | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
} | |
void m68k_op_divs_16_pcdi(void) | |
{ | |
uint* r_dst = &DX; | |
sint src = MAKE_INT_16(OPER_PCDI_16()); | |
sint quotient; | |
sint remainder; | |
if(src != 0) | |
{ | |
if((uint32)*r_dst == 0x80000000 && src == -1) | |
{ | |
FLAG_Z = 0; | |
FLAG_N = NFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
*r_dst = 0; | |
return; | |
} | |
quotient = MAKE_INT_32(*r_dst) / src; | |
remainder = MAKE_INT_32(*r_dst) % src; | |
if(quotient == MAKE_INT_16(quotient)) | |
{ | |
FLAG_Z = quotient; | |
FLAG_N = NFLAG_16(quotient); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
*r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); | |
return; | |
} | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
} | |
void m68k_op_divs_16_pcix(void) | |
{ | |
uint* r_dst = &DX; | |
sint src = MAKE_INT_16(OPER_PCIX_16()); | |
sint quotient; | |
sint remainder; | |
if(src != 0) | |
{ | |
if((uint32)*r_dst == 0x80000000 && src == -1) | |
{ | |
FLAG_Z = 0; | |
FLAG_N = NFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
*r_dst = 0; | |
return; | |
} | |
quotient = MAKE_INT_32(*r_dst) / src; | |
remainder = MAKE_INT_32(*r_dst) % src; | |
if(quotient == MAKE_INT_16(quotient)) | |
{ | |
FLAG_Z = quotient; | |
FLAG_N = NFLAG_16(quotient); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
*r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); | |
return; | |
} | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
} | |
void m68k_op_divs_16_i(void) | |
{ | |
uint* r_dst = &DX; | |
sint src = MAKE_INT_16(OPER_I_16()); | |
sint quotient; | |
sint remainder; | |
if(src != 0) | |
{ | |
if((uint32)*r_dst == 0x80000000 && src == -1) | |
{ | |
FLAG_Z = 0; | |
FLAG_N = NFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
*r_dst = 0; | |
return; | |
} | |
quotient = MAKE_INT_32(*r_dst) / src; | |
remainder = MAKE_INT_32(*r_dst) % src; | |
if(quotient == MAKE_INT_16(quotient)) | |
{ | |
FLAG_Z = quotient; | |
FLAG_N = NFLAG_16(quotient); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
*r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); | |
return; | |
} | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
} | |
void m68k_op_divu_16_d(void) | |
{ | |
uint* r_dst = &DX; | |
uint src = MASK_OUT_ABOVE_16(DY); | |
if(src != 0) | |
{ | |
uint quotient = *r_dst / src; | |
uint remainder = *r_dst % src; | |
if(quotient < 0x10000) | |
{ | |
FLAG_Z = quotient; | |
FLAG_N = NFLAG_16(quotient); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
*r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); | |
return; | |
} | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
} | |
void m68k_op_divu_16_ai(void) | |
{ | |
uint* r_dst = &DX; | |
uint src = OPER_AY_AI_16(); | |
if(src != 0) | |
{ | |
uint quotient = *r_dst / src; | |
uint remainder = *r_dst % src; | |
if(quotient < 0x10000) | |
{ | |
FLAG_Z = quotient; | |
FLAG_N = NFLAG_16(quotient); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
*r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); | |
return; | |
} | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
} | |
void m68k_op_divu_16_pi(void) | |
{ | |
uint* r_dst = &DX; | |
uint src = OPER_AY_PI_16(); | |
if(src != 0) | |
{ | |
uint quotient = *r_dst / src; | |
uint remainder = *r_dst % src; | |
if(quotient < 0x10000) | |
{ | |
FLAG_Z = quotient; | |
FLAG_N = NFLAG_16(quotient); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
*r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); | |
return; | |
} | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
} | |
void m68k_op_divu_16_pd(void) | |
{ | |
uint* r_dst = &DX; | |
uint src = OPER_AY_PD_16(); | |
if(src != 0) | |
{ | |
uint quotient = *r_dst / src; | |
uint remainder = *r_dst % src; | |
if(quotient < 0x10000) | |
{ | |
FLAG_Z = quotient; | |
FLAG_N = NFLAG_16(quotient); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
*r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); | |
return; | |
} | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
} | |
void m68k_op_divu_16_di(void) | |
{ | |
uint* r_dst = &DX; | |
uint src = OPER_AY_DI_16(); | |
if(src != 0) | |
{ | |
uint quotient = *r_dst / src; | |
uint remainder = *r_dst % src; | |
if(quotient < 0x10000) | |
{ | |
FLAG_Z = quotient; | |
FLAG_N = NFLAG_16(quotient); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
*r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); | |
return; | |
} | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
} | |
void m68k_op_divu_16_ix(void) | |
{ | |
uint* r_dst = &DX; | |
uint src = OPER_AY_IX_16(); | |
if(src != 0) | |
{ | |
uint quotient = *r_dst / src; | |
uint remainder = *r_dst % src; | |
if(quotient < 0x10000) | |
{ | |
FLAG_Z = quotient; | |
FLAG_N = NFLAG_16(quotient); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
*r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); | |
return; | |
} | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
} | |
void m68k_op_divu_16_aw(void) | |
{ | |
uint* r_dst = &DX; | |
uint src = OPER_AW_16(); | |
if(src != 0) | |
{ | |
uint quotient = *r_dst / src; | |
uint remainder = *r_dst % src; | |
if(quotient < 0x10000) | |
{ | |
FLAG_Z = quotient; | |
FLAG_N = NFLAG_16(quotient); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
*r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); | |
return; | |
} | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
} | |
void m68k_op_divu_16_al(void) | |
{ | |
uint* r_dst = &DX; | |
uint src = OPER_AL_16(); | |
if(src != 0) | |
{ | |
uint quotient = *r_dst / src; | |
uint remainder = *r_dst % src; | |
if(quotient < 0x10000) | |
{ | |
FLAG_Z = quotient; | |
FLAG_N = NFLAG_16(quotient); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
*r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); | |
return; | |
} | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
} | |
void m68k_op_divu_16_pcdi(void) | |
{ | |
uint* r_dst = &DX; | |
uint src = OPER_PCDI_16(); | |
if(src != 0) | |
{ | |
uint quotient = *r_dst / src; | |
uint remainder = *r_dst % src; | |
if(quotient < 0x10000) | |
{ | |
FLAG_Z = quotient; | |
FLAG_N = NFLAG_16(quotient); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
*r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); | |
return; | |
} | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
} | |
void m68k_op_divu_16_pcix(void) | |
{ | |
uint* r_dst = &DX; | |
uint src = OPER_PCIX_16(); | |
if(src != 0) | |
{ | |
uint quotient = *r_dst / src; | |
uint remainder = *r_dst % src; | |
if(quotient < 0x10000) | |
{ | |
FLAG_Z = quotient; | |
FLAG_N = NFLAG_16(quotient); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
*r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); | |
return; | |
} | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
} | |
void m68k_op_divu_16_i(void) | |
{ | |
uint* r_dst = &DX; | |
uint src = OPER_I_16(); | |
if(src != 0) | |
{ | |
uint quotient = *r_dst / src; | |
uint remainder = *r_dst % src; | |
if(quotient < 0x10000) | |
{ | |
FLAG_Z = quotient; | |
FLAG_N = NFLAG_16(quotient); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
*r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); | |
return; | |
} | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
} | |
void m68k_op_divl_32_d(void) | |
{ | |
#if M68K_USE_64_BIT | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint64 divisor = DY; | |
uint64 dividend = 0; | |
uint64 quotient = 0; | |
uint64 remainder = 0; | |
if(divisor != 0) | |
{ | |
if(BIT_A(word2)) /* 64 bit */ | |
{ | |
dividend = REG_D[word2 & 7]; | |
dividend <<= 32; | |
dividend |= REG_D[(word2 >> 12) & 7]; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor)); | |
remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor)); | |
if((sint64)quotient != (sint64)((sint32)quotient)) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
} | |
else /* unsigned */ | |
{ | |
quotient = dividend / divisor; | |
if(quotient > 0xffffffff) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
remainder = dividend % divisor; | |
} | |
} | |
else /* 32 bit */ | |
{ | |
dividend = REG_D[(word2 >> 12) & 7]; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor)); | |
remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor)); | |
} | |
else /* unsigned */ | |
{ | |
quotient = dividend / divisor; | |
remainder = dividend % divisor; | |
} | |
} | |
REG_D[word2 & 7] = (uint)remainder; | |
REG_D[(word2 >> 12) & 7] = (uint)quotient; | |
FLAG_N = (uint)(NFLAG_32(quotient)); | |
FLAG_Z = (uint)quotient; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
return; | |
} | |
m68ki_exception_illegal(); | |
#else | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint divisor = DY; | |
uint dividend_hi = REG_D[word2 & 7]; | |
uint dividend_lo = REG_D[(word2 >> 12) & 7]; | |
uint quotient = 0; | |
uint remainder = 0; | |
uint dividend_neg = 0; | |
uint divisor_neg = 0; | |
sint i; | |
uint overflow; | |
if(divisor != 0) | |
{ | |
/* quad / long : long quotient, long remainder */ | |
if(BIT_A(word2)) | |
{ | |
if(BIT_B(word2)) /* signed */ | |
{ | |
/* special case in signed divide */ | |
if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff) | |
{ | |
REG_D[word2 & 7] = 0; | |
REG_D[(word2 >> 12) & 7] = 0x80000000; | |
FLAG_N = NFLAG_SET; | |
FLAG_Z = ZFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
if(GET_MSB_32(dividend_hi)) | |
{ | |
dividend_neg = 1; | |
dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0)); | |
dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo); | |
} | |
if(GET_MSB_32(divisor)) | |
{ | |
divisor_neg = 1; | |
divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor); | |
} | |
} | |
/* if the upper long is greater than the divisor, we're overflowing. */ | |
if(dividend_hi >= divisor) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
for(i = 31; i >= 0; i--) | |
{ | |
quotient <<= 1; | |
remainder = (remainder << 1) + ((dividend_hi >> i) & 1); | |
if(remainder >= divisor) | |
{ | |
remainder -= divisor; | |
quotient++; | |
} | |
} | |
for(i = 31; i >= 0; i--) | |
{ | |
quotient <<= 1; | |
overflow = GET_MSB_32(remainder); | |
remainder = (remainder << 1) + ((dividend_lo >> i) & 1); | |
if(remainder >= divisor || overflow) | |
{ | |
remainder -= divisor; | |
quotient++; | |
} | |
} | |
if(BIT_B(word2)) /* signed */ | |
{ | |
if(quotient > 0x7fffffff) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
if(dividend_neg) | |
{ | |
remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder); | |
quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); | |
} | |
if(divisor_neg) | |
quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); | |
} | |
REG_D[word2 & 7] = remainder; | |
REG_D[(word2 >> 12) & 7] = quotient; | |
FLAG_N = NFLAG_32(quotient); | |
FLAG_Z = quotient; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
/* long / long: long quotient, maybe long remainder */ | |
if(BIT_B(word2)) /* signed */ | |
{ | |
/* Special case in divide */ | |
if(dividend_lo == 0x80000000 && divisor == 0xffffffff) | |
{ | |
FLAG_N = NFLAG_SET; | |
FLAG_Z = ZFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
REG_D[(word2 >> 12) & 7] = 0x80000000; | |
REG_D[word2 & 7] = 0; | |
return; | |
} | |
REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor); | |
quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor); | |
} | |
else | |
{ | |
REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor); | |
quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor); | |
} | |
FLAG_N = NFLAG_32(quotient); | |
FLAG_Z = quotient; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
return; | |
} | |
m68ki_exception_illegal(); | |
#endif | |
} | |
void m68k_op_divl_32_ai(void) | |
{ | |
#if M68K_USE_64_BIT | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint64 divisor = OPER_AY_AI_32(); | |
uint64 dividend = 0; | |
uint64 quotient = 0; | |
uint64 remainder = 0; | |
if(divisor != 0) | |
{ | |
if(BIT_A(word2)) /* 64 bit */ | |
{ | |
dividend = REG_D[word2 & 7]; | |
dividend <<= 32; | |
dividend |= REG_D[(word2 >> 12) & 7]; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor)); | |
remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor)); | |
if((sint64)quotient != (sint64)((sint32)quotient)) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
} | |
else /* unsigned */ | |
{ | |
quotient = dividend / divisor; | |
if(quotient > 0xffffffff) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
remainder = dividend % divisor; | |
} | |
} | |
else /* 32 bit */ | |
{ | |
dividend = REG_D[(word2 >> 12) & 7]; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor)); | |
remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor)); | |
} | |
else /* unsigned */ | |
{ | |
quotient = dividend / divisor; | |
remainder = dividend % divisor; | |
} | |
} | |
REG_D[word2 & 7] = (uint)remainder; | |
REG_D[(word2 >> 12) & 7] = (uint)quotient; | |
FLAG_N = (uint)NFLAG_32(quotient); | |
FLAG_Z = (uint)quotient; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
return; | |
} | |
m68ki_exception_illegal(); | |
#else | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint divisor = OPER_AY_AI_32(); | |
uint dividend_hi = REG_D[word2 & 7]; | |
uint dividend_lo = REG_D[(word2 >> 12) & 7]; | |
uint quotient = 0; | |
uint remainder = 0; | |
uint dividend_neg = 0; | |
uint divisor_neg = 0; | |
sint i; | |
uint overflow; | |
if(divisor != 0) | |
{ | |
/* quad / long : long quotient, long remainder */ | |
if(BIT_A(word2)) | |
{ | |
if(BIT_B(word2)) /* signed */ | |
{ | |
/* special case in signed divide */ | |
if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff) | |
{ | |
REG_D[word2 & 7] = 0; | |
REG_D[(word2 >> 12) & 7] = 0x80000000; | |
FLAG_N = NFLAG_SET; | |
FLAG_Z = ZFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
if(GET_MSB_32(dividend_hi)) | |
{ | |
dividend_neg = 1; | |
dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0)); | |
dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo); | |
} | |
if(GET_MSB_32(divisor)) | |
{ | |
divisor_neg = 1; | |
divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor); | |
} | |
} | |
/* if the upper long is greater than the divisor, we're overflowing. */ | |
if(dividend_hi >= divisor) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
for(i = 31; i >= 0; i--) | |
{ | |
quotient <<= 1; | |
remainder = (remainder << 1) + ((dividend_hi >> i) & 1); | |
if(remainder >= divisor) | |
{ | |
remainder -= divisor; | |
quotient++; | |
} | |
} | |
for(i = 31; i >= 0; i--) | |
{ | |
quotient <<= 1; | |
overflow = GET_MSB_32(remainder); | |
remainder = (remainder << 1) + ((dividend_lo >> i) & 1); | |
if(remainder >= divisor || overflow) | |
{ | |
remainder -= divisor; | |
quotient++; | |
} | |
} | |
if(BIT_B(word2)) /* signed */ | |
{ | |
if(quotient > 0x7fffffff) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
if(dividend_neg) | |
{ | |
remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder); | |
quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); | |
} | |
if(divisor_neg) | |
quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); | |
} | |
REG_D[word2 & 7] = remainder; | |
REG_D[(word2 >> 12) & 7] = quotient; | |
FLAG_N = NFLAG_32(quotient); | |
FLAG_Z = quotient; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
/* long / long: long quotient, maybe long remainder */ | |
if(BIT_B(word2)) /* signed */ | |
{ | |
/* Special case in divide */ | |
if(dividend_lo == 0x80000000 && divisor == 0xffffffff) | |
{ | |
FLAG_N = NFLAG_SET; | |
FLAG_Z = ZFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
REG_D[(word2 >> 12) & 7] = 0x80000000; | |
REG_D[word2 & 7] = 0; | |
return; | |
} | |
REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor); | |
quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor); | |
} | |
else | |
{ | |
REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor); | |
quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor); | |
} | |
FLAG_N = NFLAG_32(quotient); | |
FLAG_Z = quotient; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
return; | |
} | |
m68ki_exception_illegal(); | |
#endif | |
} | |
void m68k_op_divl_32_pi(void) | |
{ | |
#if M68K_USE_64_BIT | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint64 divisor = OPER_AY_PI_32(); | |
uint64 dividend = 0; | |
uint64 quotient = 0; | |
uint64 remainder = 0; | |
if(divisor != 0) | |
{ | |
if(BIT_A(word2)) /* 64 bit */ | |
{ | |
dividend = REG_D[word2 & 7]; | |
dividend <<= 32; | |
dividend |= REG_D[(word2 >> 12) & 7]; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor)); | |
remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor)); | |
if((sint64)quotient != (sint64)((sint32)quotient)) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
} | |
else /* unsigned */ | |
{ | |
quotient = dividend / divisor; | |
if(quotient > 0xffffffff) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
remainder = dividend % divisor; | |
} | |
} | |
else /* 32 bit */ | |
{ | |
dividend = REG_D[(word2 >> 12) & 7]; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor)); | |
remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor)); | |
} | |
else /* unsigned */ | |
{ | |
quotient = dividend / divisor; | |
remainder = dividend % divisor; | |
} | |
} | |
REG_D[word2 & 7] = (uint)remainder; | |
REG_D[(word2 >> 12) & 7] = (uint)quotient; | |
FLAG_N = (uint)NFLAG_32(quotient); | |
FLAG_Z = (uint)quotient; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
return; | |
} | |
m68ki_exception_illegal(); | |
#else | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint divisor = OPER_AY_PI_32(); | |
uint dividend_hi = REG_D[word2 & 7]; | |
uint dividend_lo = REG_D[(word2 >> 12) & 7]; | |
uint quotient = 0; | |
uint remainder = 0; | |
uint dividend_neg = 0; | |
uint divisor_neg = 0; | |
sint i; | |
uint overflow; | |
if(divisor != 0) | |
{ | |
/* quad / long : long quotient, long remainder */ | |
if(BIT_A(word2)) | |
{ | |
if(BIT_B(word2)) /* signed */ | |
{ | |
/* special case in signed divide */ | |
if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff) | |
{ | |
REG_D[word2 & 7] = 0; | |
REG_D[(word2 >> 12) & 7] = 0x80000000; | |
FLAG_N = NFLAG_SET; | |
FLAG_Z = ZFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
if(GET_MSB_32(dividend_hi)) | |
{ | |
dividend_neg = 1; | |
dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0)); | |
dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo); | |
} | |
if(GET_MSB_32(divisor)) | |
{ | |
divisor_neg = 1; | |
divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor); | |
} | |
} | |
/* if the upper long is greater than the divisor, we're overflowing. */ | |
if(dividend_hi >= divisor) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
for(i = 31; i >= 0; i--) | |
{ | |
quotient <<= 1; | |
remainder = (remainder << 1) + ((dividend_hi >> i) & 1); | |
if(remainder >= divisor) | |
{ | |
remainder -= divisor; | |
quotient++; | |
} | |
} | |
for(i = 31; i >= 0; i--) | |
{ | |
quotient <<= 1; | |
overflow = GET_MSB_32(remainder); | |
remainder = (remainder << 1) + ((dividend_lo >> i) & 1); | |
if(remainder >= divisor || overflow) | |
{ | |
remainder -= divisor; | |
quotient++; | |
} | |
} | |
if(BIT_B(word2)) /* signed */ | |
{ | |
if(quotient > 0x7fffffff) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
if(dividend_neg) | |
{ | |
remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder); | |
quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); | |
} | |
if(divisor_neg) | |
quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); | |
} | |
REG_D[word2 & 7] = remainder; | |
REG_D[(word2 >> 12) & 7] = quotient; | |
FLAG_N = NFLAG_32(quotient); | |
FLAG_Z = quotient; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
/* long / long: long quotient, maybe long remainder */ | |
if(BIT_B(word2)) /* signed */ | |
{ | |
/* Special case in divide */ | |
if(dividend_lo == 0x80000000 && divisor == 0xffffffff) | |
{ | |
FLAG_N = NFLAG_SET; | |
FLAG_Z = ZFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
REG_D[(word2 >> 12) & 7] = 0x80000000; | |
REG_D[word2 & 7] = 0; | |
return; | |
} | |
REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor); | |
quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor); | |
} | |
else | |
{ | |
REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor); | |
quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor); | |
} | |
FLAG_N = NFLAG_32(quotient); | |
FLAG_Z = quotient; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
return; | |
} | |
m68ki_exception_illegal(); | |
#endif | |
} | |
void m68k_op_divl_32_pd(void) | |
{ | |
#if M68K_USE_64_BIT | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint64 divisor = OPER_AY_PD_32(); | |
uint64 dividend = 0; | |
uint64 quotient = 0; | |
uint64 remainder = 0; | |
if(divisor != 0) | |
{ | |
if(BIT_A(word2)) /* 64 bit */ | |
{ | |
dividend = REG_D[word2 & 7]; | |
dividend <<= 32; | |
dividend |= REG_D[(word2 >> 12) & 7]; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor)); | |
remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor)); | |
if((sint64)quotient != (sint64)((sint32)quotient)) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
} | |
else /* unsigned */ | |
{ | |
quotient = dividend / divisor; | |
if(quotient > 0xffffffff) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
remainder = dividend % divisor; | |
} | |
} | |
else /* 32 bit */ | |
{ | |
dividend = REG_D[(word2 >> 12) & 7]; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor)); | |
remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor)); | |
} | |
else /* unsigned */ | |
{ | |
quotient = dividend / divisor; | |
remainder = dividend % divisor; | |
} | |
} | |
REG_D[word2 & 7] = (uint)remainder; | |
REG_D[(word2 >> 12) & 7] = (uint)quotient; | |
FLAG_N = (uint)NFLAG_32(quotient); | |
FLAG_Z = (uint)quotient; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
return; | |
} | |
m68ki_exception_illegal(); | |
#else | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint divisor = OPER_AY_PD_32(); | |
uint dividend_hi = REG_D[word2 & 7]; | |
uint dividend_lo = REG_D[(word2 >> 12) & 7]; | |
uint quotient = 0; | |
uint remainder = 0; | |
uint dividend_neg = 0; | |
uint divisor_neg = 0; | |
sint i; | |
uint overflow; | |
if(divisor != 0) | |
{ | |
/* quad / long : long quotient, long remainder */ | |
if(BIT_A(word2)) | |
{ | |
if(BIT_B(word2)) /* signed */ | |
{ | |
/* special case in signed divide */ | |
if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff) | |
{ | |
REG_D[word2 & 7] = 0; | |
REG_D[(word2 >> 12) & 7] = 0x80000000; | |
FLAG_N = NFLAG_SET; | |
FLAG_Z = ZFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
if(GET_MSB_32(dividend_hi)) | |
{ | |
dividend_neg = 1; | |
dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0)); | |
dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo); | |
} | |
if(GET_MSB_32(divisor)) | |
{ | |
divisor_neg = 1; | |
divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor); | |
} | |
} | |
/* if the upper long is greater than the divisor, we're overflowing. */ | |
if(dividend_hi >= divisor) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
for(i = 31; i >= 0; i--) | |
{ | |
quotient <<= 1; | |
remainder = (remainder << 1) + ((dividend_hi >> i) & 1); | |
if(remainder >= divisor) | |
{ | |
remainder -= divisor; | |
quotient++; | |
} | |
} | |
for(i = 31; i >= 0; i--) | |
{ | |
quotient <<= 1; | |
overflow = GET_MSB_32(remainder); | |
remainder = (remainder << 1) + ((dividend_lo >> i) & 1); | |
if(remainder >= divisor || overflow) | |
{ | |
remainder -= divisor; | |
quotient++; | |
} | |
} | |
if(BIT_B(word2)) /* signed */ | |
{ | |
if(quotient > 0x7fffffff) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
if(dividend_neg) | |
{ | |
remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder); | |
quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); | |
} | |
if(divisor_neg) | |
quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); | |
} | |
REG_D[word2 & 7] = remainder; | |
REG_D[(word2 >> 12) & 7] = quotient; | |
FLAG_N = NFLAG_32(quotient); | |
FLAG_Z = quotient; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
/* long / long: long quotient, maybe long remainder */ | |
if(BIT_B(word2)) /* signed */ | |
{ | |
/* Special case in divide */ | |
if(dividend_lo == 0x80000000 && divisor == 0xffffffff) | |
{ | |
FLAG_N = NFLAG_SET; | |
FLAG_Z = ZFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
REG_D[(word2 >> 12) & 7] = 0x80000000; | |
REG_D[word2 & 7] = 0; | |
return; | |
} | |
REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor); | |
quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor); | |
} | |
else | |
{ | |
REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor); | |
quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor); | |
} | |
FLAG_N = NFLAG_32(quotient); | |
FLAG_Z = quotient; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
return; | |
} | |
m68ki_exception_illegal(); | |
#endif | |
} | |
void m68k_op_divl_32_di(void) | |
{ | |
#if M68K_USE_64_BIT | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint64 divisor = OPER_AY_DI_32(); | |
uint64 dividend = 0; | |
uint64 quotient = 0; | |
uint64 remainder = 0; | |
if(divisor != 0) | |
{ | |
if(BIT_A(word2)) /* 64 bit */ | |
{ | |
dividend = REG_D[word2 & 7]; | |
dividend <<= 32; | |
dividend |= REG_D[(word2 >> 12) & 7]; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor)); | |
remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor)); | |
if((sint64)quotient != (sint64)((sint32)quotient)) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
} | |
else /* unsigned */ | |
{ | |
quotient = dividend / divisor; | |
if(quotient > 0xffffffff) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
remainder = dividend % divisor; | |
} | |
} | |
else /* 32 bit */ | |
{ | |
dividend = REG_D[(word2 >> 12) & 7]; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor)); | |
remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor)); | |
} | |
else /* unsigned */ | |
{ | |
quotient = dividend / divisor; | |
remainder = dividend % divisor; | |
} | |
} | |
REG_D[word2 & 7] = (uint)remainder; | |
REG_D[(word2 >> 12) & 7] = (uint)quotient; | |
FLAG_N = (uint)NFLAG_32(quotient); | |
FLAG_Z = (uint)quotient; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
return; | |
} | |
m68ki_exception_illegal(); | |
#else | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint divisor = OPER_AY_DI_32(); | |
uint dividend_hi = REG_D[word2 & 7]; | |
uint dividend_lo = REG_D[(word2 >> 12) & 7]; | |
uint quotient = 0; | |
uint remainder = 0; | |
uint dividend_neg = 0; | |
uint divisor_neg = 0; | |
sint i; | |
uint overflow; | |
if(divisor != 0) | |
{ | |
/* quad / long : long quotient, long remainder */ | |
if(BIT_A(word2)) | |
{ | |
if(BIT_B(word2)) /* signed */ | |
{ | |
/* special case in signed divide */ | |
if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff) | |
{ | |
REG_D[word2 & 7] = 0; | |
REG_D[(word2 >> 12) & 7] = 0x80000000; | |
FLAG_N = NFLAG_SET; | |
FLAG_Z = ZFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
if(GET_MSB_32(dividend_hi)) | |
{ | |
dividend_neg = 1; | |
dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0)); | |
dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo); | |
} | |
if(GET_MSB_32(divisor)) | |
{ | |
divisor_neg = 1; | |
divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor); | |
} | |
} | |
/* if the upper long is greater than the divisor, we're overflowing. */ | |
if(dividend_hi >= divisor) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
for(i = 31; i >= 0; i--) | |
{ | |
quotient <<= 1; | |
remainder = (remainder << 1) + ((dividend_hi >> i) & 1); | |
if(remainder >= divisor) | |
{ | |
remainder -= divisor; | |
quotient++; | |
} | |
} | |
for(i = 31; i >= 0; i--) | |
{ | |
quotient <<= 1; | |
overflow = GET_MSB_32(remainder); | |
remainder = (remainder << 1) + ((dividend_lo >> i) & 1); | |
if(remainder >= divisor || overflow) | |
{ | |
remainder -= divisor; | |
quotient++; | |
} | |
} | |
if(BIT_B(word2)) /* signed */ | |
{ | |
if(quotient > 0x7fffffff) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
if(dividend_neg) | |
{ | |
remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder); | |
quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); | |
} | |
if(divisor_neg) | |
quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); | |
} | |
REG_D[word2 & 7] = remainder; | |
REG_D[(word2 >> 12) & 7] = quotient; | |
FLAG_N = NFLAG_32(quotient); | |
FLAG_Z = quotient; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
/* long / long: long quotient, maybe long remainder */ | |
if(BIT_B(word2)) /* signed */ | |
{ | |
/* Special case in divide */ | |
if(dividend_lo == 0x80000000 && divisor == 0xffffffff) | |
{ | |
FLAG_N = NFLAG_SET; | |
FLAG_Z = ZFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
REG_D[(word2 >> 12) & 7] = 0x80000000; | |
REG_D[word2 & 7] = 0; | |
return; | |
} | |
REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor); | |
quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor); | |
} | |
else | |
{ | |
REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor); | |
quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor); | |
} | |
FLAG_N = NFLAG_32(quotient); | |
FLAG_Z = quotient; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
return; | |
} | |
m68ki_exception_illegal(); | |
#endif | |
} | |
void m68k_op_divl_32_ix(void) | |
{ | |
#if M68K_USE_64_BIT | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint64 divisor = OPER_AY_IX_32(); | |
uint64 dividend = 0; | |
uint64 quotient = 0; | |
uint64 remainder = 0; | |
if(divisor != 0) | |
{ | |
if(BIT_A(word2)) /* 64 bit */ | |
{ | |
dividend = REG_D[word2 & 7]; | |
dividend <<= 32; | |
dividend |= REG_D[(word2 >> 12) & 7]; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor)); | |
remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor)); | |
if((sint64)quotient != (sint64)((sint32)quotient)) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
} | |
else /* unsigned */ | |
{ | |
quotient = dividend / divisor; | |
if(quotient > 0xffffffff) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
remainder = dividend % divisor; | |
} | |
} | |
else /* 32 bit */ | |
{ | |
dividend = REG_D[(word2 >> 12) & 7]; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor)); | |
remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor)); | |
} | |
else /* unsigned */ | |
{ | |
quotient = dividend / divisor; | |
remainder = dividend % divisor; | |
} | |
} | |
REG_D[word2 & 7] = (uint)remainder; | |
REG_D[(word2 >> 12) & 7] = (uint)quotient; | |
FLAG_N = (uint)NFLAG_32(quotient); | |
FLAG_Z = (uint)quotient; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
return; | |
} | |
m68ki_exception_illegal(); | |
#else | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint divisor = OPER_AY_IX_32(); | |
uint dividend_hi = REG_D[word2 & 7]; | |
uint dividend_lo = REG_D[(word2 >> 12) & 7]; | |
uint quotient = 0; | |
uint remainder = 0; | |
uint dividend_neg = 0; | |
uint divisor_neg = 0; | |
sint i; | |
uint overflow; | |
if(divisor != 0) | |
{ | |
/* quad / long : long quotient, long remainder */ | |
if(BIT_A(word2)) | |
{ | |
if(BIT_B(word2)) /* signed */ | |
{ | |
/* special case in signed divide */ | |
if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff) | |
{ | |
REG_D[word2 & 7] = 0; | |
REG_D[(word2 >> 12) & 7] = 0x80000000; | |
FLAG_N = NFLAG_SET; | |
FLAG_Z = ZFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
if(GET_MSB_32(dividend_hi)) | |
{ | |
dividend_neg = 1; | |
dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0)); | |
dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo); | |
} | |
if(GET_MSB_32(divisor)) | |
{ | |
divisor_neg = 1; | |
divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor); | |
} | |
} | |
/* if the upper long is greater than the divisor, we're overflowing. */ | |
if(dividend_hi >= divisor) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
for(i = 31; i >= 0; i--) | |
{ | |
quotient <<= 1; | |
remainder = (remainder << 1) + ((dividend_hi >> i) & 1); | |
if(remainder >= divisor) | |
{ | |
remainder -= divisor; | |
quotient++; | |
} | |
} | |
for(i = 31; i >= 0; i--) | |
{ | |
quotient <<= 1; | |
overflow = GET_MSB_32(remainder); | |
remainder = (remainder << 1) + ((dividend_lo >> i) & 1); | |
if(remainder >= divisor || overflow) | |
{ | |
remainder -= divisor; | |
quotient++; | |
} | |
} | |
if(BIT_B(word2)) /* signed */ | |
{ | |
if(quotient > 0x7fffffff) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
if(dividend_neg) | |
{ | |
remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder); | |
quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); | |
} | |
if(divisor_neg) | |
quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); | |
} | |
REG_D[word2 & 7] = remainder; | |
REG_D[(word2 >> 12) & 7] = quotient; | |
FLAG_N = NFLAG_32(quotient); | |
FLAG_Z = quotient; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
/* long / long: long quotient, maybe long remainder */ | |
if(BIT_B(word2)) /* signed */ | |
{ | |
/* Special case in divide */ | |
if(dividend_lo == 0x80000000 && divisor == 0xffffffff) | |
{ | |
FLAG_N = NFLAG_SET; | |
FLAG_Z = ZFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
REG_D[(word2 >> 12) & 7] = 0x80000000; | |
REG_D[word2 & 7] = 0; | |
return; | |
} | |
REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor); | |
quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor); | |
} | |
else | |
{ | |
REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor); | |
quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor); | |
} | |
FLAG_N = NFLAG_32(quotient); | |
FLAG_Z = quotient; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
return; | |
} | |
m68ki_exception_illegal(); | |
#endif | |
} | |
void m68k_op_divl_32_aw(void) | |
{ | |
#if M68K_USE_64_BIT | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint64 divisor = OPER_AW_32(); | |
uint64 dividend = 0; | |
uint64 quotient = 0; | |
uint64 remainder = 0; | |
if(divisor != 0) | |
{ | |
if(BIT_A(word2)) /* 64 bit */ | |
{ | |
dividend = REG_D[word2 & 7]; | |
dividend <<= 32; | |
dividend |= REG_D[(word2 >> 12) & 7]; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor)); | |
remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor)); | |
if((sint64)quotient != (sint64)((sint32)quotient)) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
} | |
else /* unsigned */ | |
{ | |
quotient = dividend / divisor; | |
if(quotient > 0xffffffff) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
remainder = dividend % divisor; | |
} | |
} | |
else /* 32 bit */ | |
{ | |
dividend = REG_D[(word2 >> 12) & 7]; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor)); | |
remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor)); | |
} | |
else /* unsigned */ | |
{ | |
quotient = dividend / divisor; | |
remainder = dividend % divisor; | |
} | |
} | |
REG_D[word2 & 7] = (uint)remainder; | |
REG_D[(word2 >> 12) & 7] = (uint)quotient; | |
FLAG_N = (uint)(NFLAG_32(quotient)); | |
FLAG_Z = (uint)quotient; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
return; | |
} | |
m68ki_exception_illegal(); | |
#else | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint divisor = OPER_AW_32(); | |
uint dividend_hi = REG_D[word2 & 7]; | |
uint dividend_lo = REG_D[(word2 >> 12) & 7]; | |
uint quotient = 0; | |
uint remainder = 0; | |
uint dividend_neg = 0; | |
uint divisor_neg = 0; | |
sint i; | |
uint overflow; | |
if(divisor != 0) | |
{ | |
/* quad / long : long quotient, long remainder */ | |
if(BIT_A(word2)) | |
{ | |
if(BIT_B(word2)) /* signed */ | |
{ | |
/* special case in signed divide */ | |
if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff) | |
{ | |
REG_D[word2 & 7] = 0; | |
REG_D[(word2 >> 12) & 7] = 0x80000000; | |
FLAG_N = NFLAG_SET; | |
FLAG_Z = ZFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
if(GET_MSB_32(dividend_hi)) | |
{ | |
dividend_neg = 1; | |
dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0)); | |
dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo); | |
} | |
if(GET_MSB_32(divisor)) | |
{ | |
divisor_neg = 1; | |
divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor); | |
} | |
} | |
/* if the upper long is greater than the divisor, we're overflowing. */ | |
if(dividend_hi >= divisor) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
for(i = 31; i >= 0; i--) | |
{ | |
quotient <<= 1; | |
remainder = (remainder << 1) + ((dividend_hi >> i) & 1); | |
if(remainder >= divisor) | |
{ | |
remainder -= divisor; | |
quotient++; | |
} | |
} | |
for(i = 31; i >= 0; i--) | |
{ | |
quotient <<= 1; | |
overflow = GET_MSB_32(remainder); | |
remainder = (remainder << 1) + ((dividend_lo >> i) & 1); | |
if(remainder >= divisor || overflow) | |
{ | |
remainder -= divisor; | |
quotient++; | |
} | |
} | |
if(BIT_B(word2)) /* signed */ | |
{ | |
if(quotient > 0x7fffffff) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
if(dividend_neg) | |
{ | |
remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder); | |
quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); | |
} | |
if(divisor_neg) | |
quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); | |
} | |
REG_D[word2 & 7] = remainder; | |
REG_D[(word2 >> 12) & 7] = quotient; | |
FLAG_N = NFLAG_32(quotient); | |
FLAG_Z = quotient; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
/* long / long: long quotient, maybe long remainder */ | |
if(BIT_B(word2)) /* signed */ | |
{ | |
/* Special case in divide */ | |
if(dividend_lo == 0x80000000 && divisor == 0xffffffff) | |
{ | |
FLAG_N = NFLAG_SET; | |
FLAG_Z = ZFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
REG_D[(word2 >> 12) & 7] = 0x80000000; | |
REG_D[word2 & 7] = 0; | |
return; | |
} | |
REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor); | |
quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor); | |
} | |
else | |
{ | |
REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor); | |
quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor); | |
} | |
FLAG_N = NFLAG_32(quotient); | |
FLAG_Z = quotient; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
return; | |
} | |
m68ki_exception_illegal(); | |
#endif | |
} | |
void m68k_op_divl_32_al(void) | |
{ | |
#if M68K_USE_64_BIT | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint64 divisor = OPER_AL_32(); | |
uint64 dividend = 0; | |
uint64 quotient = 0; | |
uint64 remainder = 0; | |
if(divisor != 0) | |
{ | |
if(BIT_A(word2)) /* 64 bit */ | |
{ | |
dividend = REG_D[word2 & 7]; | |
dividend <<= 32; | |
dividend |= REG_D[(word2 >> 12) & 7]; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor)); | |
remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor)); | |
if((sint64)quotient != (sint64)((sint32)quotient)) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
} | |
else /* unsigned */ | |
{ | |
quotient = dividend / divisor; | |
if(quotient > 0xffffffff) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
remainder = dividend % divisor; | |
} | |
} | |
else /* 32 bit */ | |
{ | |
dividend = REG_D[(word2 >> 12) & 7]; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor)); | |
remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor)); | |
} | |
else /* unsigned */ | |
{ | |
quotient = dividend / divisor; | |
remainder = dividend % divisor; | |
} | |
} | |
REG_D[word2 & 7] = (uint)remainder; | |
REG_D[(word2 >> 12) & 7] = (uint)quotient; | |
FLAG_N = (uint)(NFLAG_32(quotient)); | |
FLAG_Z = (uint)quotient; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
return; | |
} | |
m68ki_exception_illegal(); | |
#else | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint divisor = OPER_AL_32(); | |
uint dividend_hi = REG_D[word2 & 7]; | |
uint dividend_lo = REG_D[(word2 >> 12) & 7]; | |
uint quotient = 0; | |
uint remainder = 0; | |
uint dividend_neg = 0; | |
uint divisor_neg = 0; | |
sint i; | |
uint overflow; | |
if(divisor != 0) | |
{ | |
/* quad / long : long quotient, long remainder */ | |
if(BIT_A(word2)) | |
{ | |
if(BIT_B(word2)) /* signed */ | |
{ | |
/* special case in signed divide */ | |
if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff) | |
{ | |
REG_D[word2 & 7] = 0; | |
REG_D[(word2 >> 12) & 7] = 0x80000000; | |
FLAG_N = NFLAG_SET; | |
FLAG_Z = ZFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
if(GET_MSB_32(dividend_hi)) | |
{ | |
dividend_neg = 1; | |
dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0)); | |
dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo); | |
} | |
if(GET_MSB_32(divisor)) | |
{ | |
divisor_neg = 1; | |
divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor); | |
} | |
} | |
/* if the upper long is greater than the divisor, we're overflowing. */ | |
if(dividend_hi >= divisor) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
for(i = 31; i >= 0; i--) | |
{ | |
quotient <<= 1; | |
remainder = (remainder << 1) + ((dividend_hi >> i) & 1); | |
if(remainder >= divisor) | |
{ | |
remainder -= divisor; | |
quotient++; | |
} | |
} | |
for(i = 31; i >= 0; i--) | |
{ | |
quotient <<= 1; | |
overflow = GET_MSB_32(remainder); | |
remainder = (remainder << 1) + ((dividend_lo >> i) & 1); | |
if(remainder >= divisor || overflow) | |
{ | |
remainder -= divisor; | |
quotient++; | |
} | |
} | |
if(BIT_B(word2)) /* signed */ | |
{ | |
if(quotient > 0x7fffffff) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
if(dividend_neg) | |
{ | |
remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder); | |
quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); | |
} | |
if(divisor_neg) | |
quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); | |
} | |
REG_D[word2 & 7] = remainder; | |
REG_D[(word2 >> 12) & 7] = quotient; | |
FLAG_N = NFLAG_32(quotient); | |
FLAG_Z = quotient; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
/* long / long: long quotient, maybe long remainder */ | |
if(BIT_B(word2)) /* signed */ | |
{ | |
/* Special case in divide */ | |
if(dividend_lo == 0x80000000 && divisor == 0xffffffff) | |
{ | |
FLAG_N = NFLAG_SET; | |
FLAG_Z = ZFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
REG_D[(word2 >> 12) & 7] = 0x80000000; | |
REG_D[word2 & 7] = 0; | |
return; | |
} | |
REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor); | |
quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor); | |
} | |
else | |
{ | |
REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor); | |
quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor); | |
} | |
FLAG_N = NFLAG_32(quotient); | |
FLAG_Z = quotient; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
return; | |
} | |
m68ki_exception_illegal(); | |
#endif | |
} | |
void m68k_op_divl_32_pcdi(void) | |
{ | |
#if M68K_USE_64_BIT | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint64 divisor = OPER_PCDI_32(); | |
uint64 dividend = 0; | |
uint64 quotient = 0; | |
uint64 remainder = 0; | |
if(divisor != 0) | |
{ | |
if(BIT_A(word2)) /* 64 bit */ | |
{ | |
dividend = REG_D[word2 & 7]; | |
dividend <<= 32; | |
dividend |= REG_D[(word2 >> 12) & 7]; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor)); | |
remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor)); | |
if((sint64)quotient != (sint64)((sint32)quotient)) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
} | |
else /* unsigned */ | |
{ | |
quotient = dividend / divisor; | |
if(quotient > 0xffffffff) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
remainder = dividend % divisor; | |
} | |
} | |
else /* 32 bit */ | |
{ | |
dividend = REG_D[(word2 >> 12) & 7]; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor)); | |
remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor)); | |
} | |
else /* unsigned */ | |
{ | |
quotient = dividend / divisor; | |
remainder = dividend % divisor; | |
} | |
} | |
REG_D[word2 & 7] = (uint)remainder; | |
REG_D[(word2 >> 12) & 7] = (uint)quotient; | |
FLAG_N = (uint)(NFLAG_32(quotient)); | |
FLAG_Z = (uint)quotient; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
return; | |
} | |
m68ki_exception_illegal(); | |
#else | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint divisor = OPER_PCDI_32(); | |
uint dividend_hi = REG_D[word2 & 7]; | |
uint dividend_lo = REG_D[(word2 >> 12) & 7]; | |
uint quotient = 0; | |
uint remainder = 0; | |
uint dividend_neg = 0; | |
uint divisor_neg = 0; | |
sint i; | |
uint overflow; | |
if(divisor != 0) | |
{ | |
/* quad / long : long quotient, long remainder */ | |
if(BIT_A(word2)) | |
{ | |
if(BIT_B(word2)) /* signed */ | |
{ | |
/* special case in signed divide */ | |
if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff) | |
{ | |
REG_D[word2 & 7] = 0; | |
REG_D[(word2 >> 12) & 7] = 0x80000000; | |
FLAG_N = NFLAG_SET; | |
FLAG_Z = ZFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
if(GET_MSB_32(dividend_hi)) | |
{ | |
dividend_neg = 1; | |
dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0)); | |
dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo); | |
} | |
if(GET_MSB_32(divisor)) | |
{ | |
divisor_neg = 1; | |
divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor); | |
} | |
} | |
/* if the upper long is greater than the divisor, we're overflowing. */ | |
if(dividend_hi >= divisor) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
for(i = 31; i >= 0; i--) | |
{ | |
quotient <<= 1; | |
remainder = (remainder << 1) + ((dividend_hi >> i) & 1); | |
if(remainder >= divisor) | |
{ | |
remainder -= divisor; | |
quotient++; | |
} | |
} | |
for(i = 31; i >= 0; i--) | |
{ | |
quotient <<= 1; | |
overflow = GET_MSB_32(remainder); | |
remainder = (remainder << 1) + ((dividend_lo >> i) & 1); | |
if(remainder >= divisor || overflow) | |
{ | |
remainder -= divisor; | |
quotient++; | |
} | |
} | |
if(BIT_B(word2)) /* signed */ | |
{ | |
if(quotient > 0x7fffffff) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
if(dividend_neg) | |
{ | |
remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder); | |
quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); | |
} | |
if(divisor_neg) | |
quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); | |
} | |
REG_D[word2 & 7] = remainder; | |
REG_D[(word2 >> 12) & 7] = quotient; | |
FLAG_N = NFLAG_32(quotient); | |
FLAG_Z = quotient; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
/* long / long: long quotient, maybe long remainder */ | |
if(BIT_B(word2)) /* signed */ | |
{ | |
/* Special case in divide */ | |
if(dividend_lo == 0x80000000 && divisor == 0xffffffff) | |
{ | |
FLAG_N = NFLAG_SET; | |
FLAG_Z = ZFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
REG_D[(word2 >> 12) & 7] = 0x80000000; | |
REG_D[word2 & 7] = 0; | |
return; | |
} | |
REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor); | |
quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor); | |
} | |
else | |
{ | |
REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor); | |
quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor); | |
} | |
FLAG_N = NFLAG_32(quotient); | |
FLAG_Z = quotient; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
return; | |
} | |
m68ki_exception_illegal(); | |
#endif | |
} | |
void m68k_op_divl_32_pcix(void) | |
{ | |
#if M68K_USE_64_BIT | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint64 divisor = OPER_PCIX_32(); | |
uint64 dividend = 0; | |
uint64 quotient = 0; | |
uint64 remainder = 0; | |
if(divisor != 0) | |
{ | |
if(BIT_A(word2)) /* 64 bit */ | |
{ | |
dividend = REG_D[word2 & 7]; | |
dividend <<= 32; | |
dividend |= REG_D[(word2 >> 12) & 7]; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor)); | |
remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor)); | |
if((sint64)quotient != (sint64)((sint32)quotient)) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
} | |
else /* unsigned */ | |
{ | |
quotient = dividend / divisor; | |
if(quotient > 0xffffffff) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
remainder = dividend % divisor; | |
} | |
} | |
else /* 32 bit */ | |
{ | |
dividend = REG_D[(word2 >> 12) & 7]; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor)); | |
remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor)); | |
} | |
else /* unsigned */ | |
{ | |
quotient = dividend / divisor; | |
remainder = dividend % divisor; | |
} | |
} | |
REG_D[word2 & 7] = (uint)remainder; | |
REG_D[(word2 >> 12) & 7] = (uint)quotient; | |
FLAG_N = (uint)(NFLAG_32(quotient)); | |
FLAG_Z = (uint)quotient; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
return; | |
} | |
m68ki_exception_illegal(); | |
#else | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint divisor = OPER_PCIX_32(); | |
uint dividend_hi = REG_D[word2 & 7]; | |
uint dividend_lo = REG_D[(word2 >> 12) & 7]; | |
uint quotient = 0; | |
uint remainder = 0; | |
uint dividend_neg = 0; | |
uint divisor_neg = 0; | |
sint i; | |
uint overflow; | |
if(divisor != 0) | |
{ | |
/* quad / long : long quotient, long remainder */ | |
if(BIT_A(word2)) | |
{ | |
if(BIT_B(word2)) /* signed */ | |
{ | |
/* special case in signed divide */ | |
if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff) | |
{ | |
REG_D[word2 & 7] = 0; | |
REG_D[(word2 >> 12) & 7] = 0x80000000; | |
FLAG_N = NFLAG_SET; | |
FLAG_Z = ZFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
if(GET_MSB_32(dividend_hi)) | |
{ | |
dividend_neg = 1; | |
dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0)); | |
dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo); | |
} | |
if(GET_MSB_32(divisor)) | |
{ | |
divisor_neg = 1; | |
divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor); | |
} | |
} | |
/* if the upper long is greater than the divisor, we're overflowing. */ | |
if(dividend_hi >= divisor) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
for(i = 31; i >= 0; i--) | |
{ | |
quotient <<= 1; | |
remainder = (remainder << 1) + ((dividend_hi >> i) & 1); | |
if(remainder >= divisor) | |
{ | |
remainder -= divisor; | |
quotient++; | |
} | |
} | |
for(i = 31; i >= 0; i--) | |
{ | |
quotient <<= 1; | |
overflow = GET_MSB_32(remainder); | |
remainder = (remainder << 1) + ((dividend_lo >> i) & 1); | |
if(remainder >= divisor || overflow) | |
{ | |
remainder -= divisor; | |
quotient++; | |
} | |
} | |
if(BIT_B(word2)) /* signed */ | |
{ | |
if(quotient > 0x7fffffff) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
if(dividend_neg) | |
{ | |
remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder); | |
quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); | |
} | |
if(divisor_neg) | |
quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); | |
} | |
REG_D[word2 & 7] = remainder; | |
REG_D[(word2 >> 12) & 7] = quotient; | |
FLAG_N = NFLAG_32(quotient); | |
FLAG_Z = quotient; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
/* long / long: long quotient, maybe long remainder */ | |
if(BIT_B(word2)) /* signed */ | |
{ | |
/* Special case in divide */ | |
if(dividend_lo == 0x80000000 && divisor == 0xffffffff) | |
{ | |
FLAG_N = NFLAG_SET; | |
FLAG_Z = ZFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
REG_D[(word2 >> 12) & 7] = 0x80000000; | |
REG_D[word2 & 7] = 0; | |
return; | |
} | |
REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor); | |
quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor); | |
} | |
else | |
{ | |
REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor); | |
quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor); | |
} | |
FLAG_N = NFLAG_32(quotient); | |
FLAG_Z = quotient; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
return; | |
} | |
m68ki_exception_illegal(); | |
#endif | |
} | |
void m68k_op_divl_32_i(void) | |
{ | |
#if M68K_USE_64_BIT | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint64 divisor = OPER_I_32(); | |
uint64 dividend = 0; | |
uint64 quotient = 0; | |
uint64 remainder = 0; | |
if(divisor != 0) | |
{ | |
if(BIT_A(word2)) /* 64 bit */ | |
{ | |
dividend = REG_D[word2 & 7]; | |
dividend <<= 32; | |
dividend |= REG_D[(word2 >> 12) & 7]; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor)); | |
remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor)); | |
if((sint64)quotient != (sint64)((sint32)quotient)) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
} | |
else /* unsigned */ | |
{ | |
quotient = dividend / divisor; | |
if(quotient > 0xffffffff) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
remainder = dividend % divisor; | |
} | |
} | |
else /* 32 bit */ | |
{ | |
dividend = REG_D[(word2 >> 12) & 7]; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor)); | |
remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor)); | |
} | |
else /* unsigned */ | |
{ | |
quotient = dividend / divisor; | |
remainder = dividend % divisor; | |
} | |
} | |
REG_D[word2 & 7] = (uint)remainder; | |
REG_D[(word2 >> 12) & 7] = (uint)quotient; | |
FLAG_N = (uint)(NFLAG_32(quotient)); | |
FLAG_Z = (uint)quotient; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
return; | |
} | |
m68ki_exception_illegal(); | |
#else | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint divisor = OPER_I_32(); | |
uint dividend_hi = REG_D[word2 & 7]; | |
uint dividend_lo = REG_D[(word2 >> 12) & 7]; | |
uint quotient = 0; | |
uint remainder = 0; | |
uint dividend_neg = 0; | |
uint divisor_neg = 0; | |
sint i; | |
uint overflow; | |
if(divisor != 0) | |
{ | |
/* quad / long : long quotient, long remainder */ | |
if(BIT_A(word2)) | |
{ | |
if(BIT_B(word2)) /* signed */ | |
{ | |
/* special case in signed divide */ | |
if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff) | |
{ | |
REG_D[word2 & 7] = 0; | |
REG_D[(word2 >> 12) & 7] = 0x80000000; | |
FLAG_N = NFLAG_SET; | |
FLAG_Z = ZFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
if(GET_MSB_32(dividend_hi)) | |
{ | |
dividend_neg = 1; | |
dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0)); | |
dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo); | |
} | |
if(GET_MSB_32(divisor)) | |
{ | |
divisor_neg = 1; | |
divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor); | |
} | |
} | |
/* if the upper long is greater than the divisor, we're overflowing. */ | |
if(dividend_hi >= divisor) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
for(i = 31; i >= 0; i--) | |
{ | |
quotient <<= 1; | |
remainder = (remainder << 1) + ((dividend_hi >> i) & 1); | |
if(remainder >= divisor) | |
{ | |
remainder -= divisor; | |
quotient++; | |
} | |
} | |
for(i = 31; i >= 0; i--) | |
{ | |
quotient <<= 1; | |
overflow = GET_MSB_32(remainder); | |
remainder = (remainder << 1) + ((dividend_lo >> i) & 1); | |
if(remainder >= divisor || overflow) | |
{ | |
remainder -= divisor; | |
quotient++; | |
} | |
} | |
if(BIT_B(word2)) /* signed */ | |
{ | |
if(quotient > 0x7fffffff) | |
{ | |
FLAG_V = VFLAG_SET; | |
return; | |
} | |
if(dividend_neg) | |
{ | |
remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder); | |
quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); | |
} | |
if(divisor_neg) | |
quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient); | |
} | |
REG_D[word2 & 7] = remainder; | |
REG_D[(word2 >> 12) & 7] = quotient; | |
FLAG_N = NFLAG_32(quotient); | |
FLAG_Z = quotient; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
/* long / long: long quotient, maybe long remainder */ | |
if(BIT_B(word2)) /* signed */ | |
{ | |
/* Special case in divide */ | |
if(dividend_lo == 0x80000000 && divisor == 0xffffffff) | |
{ | |
FLAG_N = NFLAG_SET; | |
FLAG_Z = ZFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
REG_D[(word2 >> 12) & 7] = 0x80000000; | |
REG_D[word2 & 7] = 0; | |
return; | |
} | |
REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor); | |
quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor); | |
} | |
else | |
{ | |
REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor); | |
quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor); | |
} | |
FLAG_N = NFLAG_32(quotient); | |
FLAG_Z = quotient; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); | |
return; | |
} | |
m68ki_exception_illegal(); | |
#endif | |
} | |
void m68k_op_eor_8_d(void) | |
{ | |
uint res = MASK_OUT_ABOVE_8(DY ^= MASK_OUT_ABOVE_8(DX)); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eor_8_ai(void) | |
{ | |
uint ea = EA_AY_AI_8(); | |
uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea)); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eor_8_pi(void) | |
{ | |
uint ea = EA_AY_PI_8(); | |
uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea)); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eor_8_pi7(void) | |
{ | |
uint ea = EA_A7_PI_8(); | |
uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea)); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eor_8_pd(void) | |
{ | |
uint ea = EA_AY_PD_8(); | |
uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea)); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eor_8_pd7(void) | |
{ | |
uint ea = EA_A7_PD_8(); | |
uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea)); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eor_8_di(void) | |
{ | |
uint ea = EA_AY_DI_8(); | |
uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea)); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eor_8_ix(void) | |
{ | |
uint ea = EA_AY_IX_8(); | |
uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea)); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eor_8_aw(void) | |
{ | |
uint ea = EA_AW_8(); | |
uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea)); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eor_8_al(void) | |
{ | |
uint ea = EA_AL_8(); | |
uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea)); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eor_16_d(void) | |
{ | |
uint res = MASK_OUT_ABOVE_16(DY ^= MASK_OUT_ABOVE_16(DX)); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eor_16_ai(void) | |
{ | |
uint ea = EA_AY_AI_16(); | |
uint res = MASK_OUT_ABOVE_16(DX ^ m68ki_read_16(ea)); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eor_16_pi(void) | |
{ | |
uint ea = EA_AY_PI_16(); | |
uint res = MASK_OUT_ABOVE_16(DX ^ m68ki_read_16(ea)); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eor_16_pd(void) | |
{ | |
uint ea = EA_AY_PD_16(); | |
uint res = MASK_OUT_ABOVE_16(DX ^ m68ki_read_16(ea)); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eor_16_di(void) | |
{ | |
uint ea = EA_AY_DI_16(); | |
uint res = MASK_OUT_ABOVE_16(DX ^ m68ki_read_16(ea)); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eor_16_ix(void) | |
{ | |
uint ea = EA_AY_IX_16(); | |
uint res = MASK_OUT_ABOVE_16(DX ^ m68ki_read_16(ea)); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eor_16_aw(void) | |
{ | |
uint ea = EA_AW_16(); | |
uint res = MASK_OUT_ABOVE_16(DX ^ m68ki_read_16(ea)); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eor_16_al(void) | |
{ | |
uint ea = EA_AL_16(); | |
uint res = MASK_OUT_ABOVE_16(DX ^ m68ki_read_16(ea)); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eor_32_d(void) | |
{ | |
uint res = DY ^= DX; | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eor_32_ai(void) | |
{ | |
uint ea = EA_AY_AI_32(); | |
uint res = DX ^ m68ki_read_32(ea); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eor_32_pi(void) | |
{ | |
uint ea = EA_AY_PI_32(); | |
uint res = DX ^ m68ki_read_32(ea); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eor_32_pd(void) | |
{ | |
uint ea = EA_AY_PD_32(); | |
uint res = DX ^ m68ki_read_32(ea); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eor_32_di(void) | |
{ | |
uint ea = EA_AY_DI_32(); | |
uint res = DX ^ m68ki_read_32(ea); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eor_32_ix(void) | |
{ | |
uint ea = EA_AY_IX_32(); | |
uint res = DX ^ m68ki_read_32(ea); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eor_32_aw(void) | |
{ | |
uint ea = EA_AW_32(); | |
uint res = DX ^ m68ki_read_32(ea); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eor_32_al(void) | |
{ | |
uint ea = EA_AL_32(); | |
uint res = DX ^ m68ki_read_32(ea); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eori_8_d(void) | |
{ | |
uint res = MASK_OUT_ABOVE_8(DY ^= OPER_I_8()); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eori_8_ai(void) | |
{ | |
uint src = OPER_I_8(); | |
uint ea = EA_AY_AI_8(); | |
uint res = src ^ m68ki_read_8(ea); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eori_8_pi(void) | |
{ | |
uint src = OPER_I_8(); | |
uint ea = EA_AY_PI_8(); | |
uint res = src ^ m68ki_read_8(ea); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eori_8_pi7(void) | |
{ | |
uint src = OPER_I_8(); | |
uint ea = EA_A7_PI_8(); | |
uint res = src ^ m68ki_read_8(ea); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eori_8_pd(void) | |
{ | |
uint src = OPER_I_8(); | |
uint ea = EA_AY_PD_8(); | |
uint res = src ^ m68ki_read_8(ea); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eori_8_pd7(void) | |
{ | |
uint src = OPER_I_8(); | |
uint ea = EA_A7_PD_8(); | |
uint res = src ^ m68ki_read_8(ea); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eori_8_di(void) | |
{ | |
uint src = OPER_I_8(); | |
uint ea = EA_AY_DI_8(); | |
uint res = src ^ m68ki_read_8(ea); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eori_8_ix(void) | |
{ | |
uint src = OPER_I_8(); | |
uint ea = EA_AY_IX_8(); | |
uint res = src ^ m68ki_read_8(ea); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eori_8_aw(void) | |
{ | |
uint src = OPER_I_8(); | |
uint ea = EA_AW_8(); | |
uint res = src ^ m68ki_read_8(ea); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eori_8_al(void) | |
{ | |
uint src = OPER_I_8(); | |
uint ea = EA_AL_8(); | |
uint res = src ^ m68ki_read_8(ea); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eori_16_d(void) | |
{ | |
uint res = MASK_OUT_ABOVE_16(DY ^= OPER_I_16()); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eori_16_ai(void) | |
{ | |
uint src = OPER_I_16(); | |
uint ea = EA_AY_AI_16(); | |
uint res = src ^ m68ki_read_16(ea); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eori_16_pi(void) | |
{ | |
uint src = OPER_I_16(); | |
uint ea = EA_AY_PI_16(); | |
uint res = src ^ m68ki_read_16(ea); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eori_16_pd(void) | |
{ | |
uint src = OPER_I_16(); | |
uint ea = EA_AY_PD_16(); | |
uint res = src ^ m68ki_read_16(ea); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eori_16_di(void) | |
{ | |
uint src = OPER_I_16(); | |
uint ea = EA_AY_DI_16(); | |
uint res = src ^ m68ki_read_16(ea); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eori_16_ix(void) | |
{ | |
uint src = OPER_I_16(); | |
uint ea = EA_AY_IX_16(); | |
uint res = src ^ m68ki_read_16(ea); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eori_16_aw(void) | |
{ | |
uint src = OPER_I_16(); | |
uint ea = EA_AW_16(); | |
uint res = src ^ m68ki_read_16(ea); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eori_16_al(void) | |
{ | |
uint src = OPER_I_16(); | |
uint ea = EA_AL_16(); | |
uint res = src ^ m68ki_read_16(ea); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eori_32_d(void) | |
{ | |
uint res = DY ^= OPER_I_32(); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eori_32_ai(void) | |
{ | |
uint src = OPER_I_32(); | |
uint ea = EA_AY_AI_32(); | |
uint res = src ^ m68ki_read_32(ea); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eori_32_pi(void) | |
{ | |
uint src = OPER_I_32(); | |
uint ea = EA_AY_PI_32(); | |
uint res = src ^ m68ki_read_32(ea); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eori_32_pd(void) | |
{ | |
uint src = OPER_I_32(); | |
uint ea = EA_AY_PD_32(); | |
uint res = src ^ m68ki_read_32(ea); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eori_32_di(void) | |
{ | |
uint src = OPER_I_32(); | |
uint ea = EA_AY_DI_32(); | |
uint res = src ^ m68ki_read_32(ea); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eori_32_ix(void) | |
{ | |
uint src = OPER_I_32(); | |
uint ea = EA_AY_IX_32(); | |
uint res = src ^ m68ki_read_32(ea); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eori_32_aw(void) | |
{ | |
uint src = OPER_I_32(); | |
uint ea = EA_AW_32(); | |
uint res = src ^ m68ki_read_32(ea); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eori_32_al(void) | |
{ | |
uint src = OPER_I_32(); | |
uint ea = EA_AL_32(); | |
uint res = src ^ m68ki_read_32(ea); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_eori_16_toc(void) | |
{ | |
m68ki_set_ccr(m68ki_get_ccr() ^ OPER_I_16()); | |
} | |
void m68k_op_eori_16_tos(void) | |
{ | |
if(FLAG_S) | |
{ | |
uint src = OPER_I_16(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
m68ki_set_sr(m68ki_get_sr() ^ src); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
} | |
void m68k_op_exg_32_dd(void) | |
{ | |
uint* reg_a = &DX; | |
uint* reg_b = &DY; | |
uint tmp = *reg_a; | |
*reg_a = *reg_b; | |
*reg_b = tmp; | |
} | |
void m68k_op_exg_32_aa(void) | |
{ | |
uint* reg_a = &AX; | |
uint* reg_b = &AY; | |
uint tmp = *reg_a; | |
*reg_a = *reg_b; | |
*reg_b = tmp; | |
} | |
void m68k_op_exg_32_da(void) | |
{ | |
uint* reg_a = &DX; | |
uint* reg_b = &AY; | |
uint tmp = *reg_a; | |
*reg_a = *reg_b; | |
*reg_b = tmp; | |
} | |
void m68k_op_ext_16(void) | |
{ | |
uint* r_dst = &DY; | |
*r_dst = MASK_OUT_BELOW_16(*r_dst) | MASK_OUT_ABOVE_8(*r_dst) | (GET_MSB_8(*r_dst) ? 0xff00 : 0); | |
FLAG_N = NFLAG_16(*r_dst); | |
FLAG_Z = MASK_OUT_ABOVE_16(*r_dst); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_ext_32(void) | |
{ | |
uint* r_dst = &DY; | |
*r_dst = MASK_OUT_ABOVE_16(*r_dst) | (GET_MSB_16(*r_dst) ? 0xffff0000 : 0); | |
FLAG_N = NFLAG_32(*r_dst); | |
FLAG_Z = *r_dst; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_extb_32(void) | |
{ | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint* r_dst = &DY; | |
*r_dst = MASK_OUT_ABOVE_8(*r_dst) | (GET_MSB_8(*r_dst) ? 0xffffff00 : 0); | |
FLAG_N = NFLAG_32(*r_dst); | |
FLAG_Z = *r_dst; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
return; | |
} | |
m68ki_exception_illegal(); | |
} | |
void m68k_op_illegal(void) | |
{ | |
m68ki_exception_illegal(); | |
} | |
void m68k_op_jmp_32_ai(void) | |
{ | |
m68ki_jump(EA_AY_AI_32()); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
if(REG_PC == REG_PPC) | |
USE_ALL_CYCLES(); | |
} | |
void m68k_op_jmp_32_di(void) | |
{ | |
m68ki_jump(EA_AY_DI_32()); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
if(REG_PC == REG_PPC) | |
USE_ALL_CYCLES(); | |
} | |
void m68k_op_jmp_32_ix(void) | |
{ | |
m68ki_jump(EA_AY_IX_32()); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
if(REG_PC == REG_PPC) | |
USE_ALL_CYCLES(); | |
} | |
void m68k_op_jmp_32_aw(void) | |
{ | |
m68ki_jump(EA_AW_32()); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
if(REG_PC == REG_PPC) | |
USE_ALL_CYCLES(); | |
} | |
void m68k_op_jmp_32_al(void) | |
{ | |
m68ki_jump(EA_AL_32()); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
if(REG_PC == REG_PPC) | |
USE_ALL_CYCLES(); | |
} | |
void m68k_op_jmp_32_pcdi(void) | |
{ | |
m68ki_jump(EA_PCDI_32()); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
if(REG_PC == REG_PPC) | |
USE_ALL_CYCLES(); | |
} | |
void m68k_op_jmp_32_pcix(void) | |
{ | |
m68ki_jump(EA_PCIX_32()); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
if(REG_PC == REG_PPC) | |
USE_ALL_CYCLES(); | |
} | |
void m68k_op_jsr_32_ai(void) | |
{ | |
uint ea = EA_AY_AI_32(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
m68ki_push_32(REG_PC); | |
m68ki_jump(ea); | |
} | |
void m68k_op_jsr_32_di(void) | |
{ | |
uint ea = EA_AY_DI_32(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
m68ki_push_32(REG_PC); | |
m68ki_jump(ea); | |
} | |
void m68k_op_jsr_32_ix(void) | |
{ | |
uint ea = EA_AY_IX_32(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
m68ki_push_32(REG_PC); | |
m68ki_jump(ea); | |
} | |
void m68k_op_jsr_32_aw(void) | |
{ | |
uint ea = EA_AW_32(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
m68ki_push_32(REG_PC); | |
m68ki_jump(ea); | |
} | |
void m68k_op_jsr_32_al(void) | |
{ | |
uint ea = EA_AL_32(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
m68ki_push_32(REG_PC); | |
m68ki_jump(ea); | |
} | |
void m68k_op_jsr_32_pcdi(void) | |
{ | |
uint ea = EA_PCDI_32(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
m68ki_push_32(REG_PC); | |
m68ki_jump(ea); | |
} | |
void m68k_op_jsr_32_pcix(void) | |
{ | |
uint ea = EA_PCIX_32(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
m68ki_push_32(REG_PC); | |
m68ki_jump(ea); | |
} | |
void m68k_op_lea_32_ai(void) | |
{ | |
AX = EA_AY_AI_32(); | |
} | |
void m68k_op_lea_32_di(void) | |
{ | |
AX = EA_AY_DI_32(); | |
} | |
void m68k_op_lea_32_ix(void) | |
{ | |
AX = EA_AY_IX_32(); | |
} | |
void m68k_op_lea_32_aw(void) | |
{ | |
AX = EA_AW_32(); | |
} | |
void m68k_op_lea_32_al(void) | |
{ | |
AX = EA_AL_32(); | |
} | |
void m68k_op_lea_32_pcdi(void) | |
{ | |
AX = EA_PCDI_32(); | |
} | |
void m68k_op_lea_32_pcix(void) | |
{ | |
AX = EA_PCIX_32(); | |
} | |
void m68k_op_link_16_a7(void) | |
{ | |
REG_A[7] -= 4; | |
m68ki_write_32(REG_A[7], REG_A[7]); | |
REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + MAKE_INT_16(OPER_I_16())); | |
} | |
void m68k_op_link_16(void) | |
{ | |
uint* r_dst = &AY; | |
m68ki_push_32(*r_dst); | |
*r_dst = REG_A[7]; | |
REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + MAKE_INT_16(OPER_I_16())); | |
} | |
void m68k_op_link_32_a7(void) | |
{ | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
REG_A[7] -= 4; | |
m68ki_write_32(REG_A[7], REG_A[7]); | |
REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + OPER_I_32()); | |
return; | |
} | |
m68ki_exception_illegal(); | |
} | |
void m68k_op_link_32(void) | |
{ | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint* r_dst = &AY; | |
m68ki_push_32(*r_dst); | |
*r_dst = REG_A[7]; | |
REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + OPER_I_32()); | |
return; | |
} | |
m68ki_exception_illegal(); | |
} | |
void m68k_op_lsr_8_s(void) | |
{ | |
uint* r_dst = &DY; | |
uint shift = (((REG_IR >> 9) - 1) & 7) + 1; | |
uint src = MASK_OUT_ABOVE_8(*r_dst); | |
uint res = src >> shift; | |
*r_dst = MASK_OUT_BELOW_8(*r_dst) | res; | |
FLAG_N = NFLAG_CLEAR; | |
FLAG_Z = res; | |
FLAG_X = FLAG_C = src << (9-shift); | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_lsr_16_s(void) | |
{ | |
uint* r_dst = &DY; | |
uint shift = (((REG_IR >> 9) - 1) & 7) + 1; | |
uint src = MASK_OUT_ABOVE_16(*r_dst); | |
uint res = src >> shift; | |
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res; | |
FLAG_N = NFLAG_CLEAR; | |
FLAG_Z = res; | |
FLAG_X = FLAG_C = src << (9-shift); | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_lsr_32_s(void) | |
{ | |
uint* r_dst = &DY; | |
uint shift = (((REG_IR >> 9) - 1) & 7) + 1; | |
uint src = *r_dst; | |
uint res = src >> shift; | |
*r_dst = res; | |
FLAG_N = NFLAG_CLEAR; | |
FLAG_Z = res; | |
FLAG_X = FLAG_C = src << (9-shift); | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_lsr_8_r(void) | |
{ | |
uint* r_dst = &DY; | |
uint shift = DX & 0x3f; | |
uint src = MASK_OUT_ABOVE_8(*r_dst); | |
uint res = src >> shift; | |
if(shift != 0) | |
{ | |
USE_CYCLES(shift<<CYC_SHIFT); | |
if(shift <= 8) | |
{ | |
*r_dst = MASK_OUT_BELOW_8(*r_dst) | res; | |
FLAG_X = FLAG_C = src << (9-shift); | |
FLAG_N = NFLAG_CLEAR; | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
return; | |
} | |
*r_dst &= 0xffffff00; | |
FLAG_X = XFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_N = NFLAG_CLEAR; | |
FLAG_Z = ZFLAG_SET; | |
FLAG_V = VFLAG_CLEAR; | |
return; | |
} | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_N = NFLAG_8(src); | |
FLAG_Z = src; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_lsr_16_r(void) | |
{ | |
uint* r_dst = &DY; | |
uint shift = DX & 0x3f; | |
uint src = MASK_OUT_ABOVE_16(*r_dst); | |
uint res = src >> shift; | |
if(shift != 0) | |
{ | |
USE_CYCLES(shift<<CYC_SHIFT); | |
if(shift <= 16) | |
{ | |
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res; | |
FLAG_C = FLAG_X = (src >> (shift - 1))<<8; | |
FLAG_N = NFLAG_CLEAR; | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
return; | |
} | |
*r_dst &= 0xffff0000; | |
FLAG_X = XFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_N = NFLAG_CLEAR; | |
FLAG_Z = ZFLAG_SET; | |
FLAG_V = VFLAG_CLEAR; | |
return; | |
} | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_N = NFLAG_16(src); | |
FLAG_Z = src; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_lsr_32_r(void) | |
{ | |
uint* r_dst = &DY; | |
uint shift = DX & 0x3f; | |
uint src = *r_dst; | |
uint res = src >> shift; | |
if(shift != 0) | |
{ | |
USE_CYCLES(shift<<CYC_SHIFT); | |
if(shift < 32) | |
{ | |
*r_dst = res; | |
FLAG_C = FLAG_X = (src >> (shift - 1))<<8; | |
FLAG_N = NFLAG_CLEAR; | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
return; | |
} | |
*r_dst = 0; | |
FLAG_X = FLAG_C = (shift == 32 ? GET_MSB_32(src)>>23 : 0); | |
FLAG_N = NFLAG_CLEAR; | |
FLAG_Z = ZFLAG_SET; | |
FLAG_V = VFLAG_CLEAR; | |
return; | |
} | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_N = NFLAG_32(src); | |
FLAG_Z = src; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_lsr_16_ai(void) | |
{ | |
uint ea = EA_AY_AI_16(); | |
uint src = m68ki_read_16(ea); | |
uint res = src >> 1; | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_CLEAR; | |
FLAG_Z = res; | |
FLAG_C = FLAG_X = src << 8; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_lsr_16_pi(void) | |
{ | |
uint ea = EA_AY_PI_16(); | |
uint src = m68ki_read_16(ea); | |
uint res = src >> 1; | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_CLEAR; | |
FLAG_Z = res; | |
FLAG_C = FLAG_X = src << 8; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_lsr_16_pd(void) | |
{ | |
uint ea = EA_AY_PD_16(); | |
uint src = m68ki_read_16(ea); | |
uint res = src >> 1; | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_CLEAR; | |
FLAG_Z = res; | |
FLAG_C = FLAG_X = src << 8; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_lsr_16_di(void) | |
{ | |
uint ea = EA_AY_DI_16(); | |
uint src = m68ki_read_16(ea); | |
uint res = src >> 1; | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_CLEAR; | |
FLAG_Z = res; | |
FLAG_C = FLAG_X = src << 8; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_lsr_16_ix(void) | |
{ | |
uint ea = EA_AY_IX_16(); | |
uint src = m68ki_read_16(ea); | |
uint res = src >> 1; | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_CLEAR; | |
FLAG_Z = res; | |
FLAG_C = FLAG_X = src << 8; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_lsr_16_aw(void) | |
{ | |
uint ea = EA_AW_16(); | |
uint src = m68ki_read_16(ea); | |
uint res = src >> 1; | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_CLEAR; | |
FLAG_Z = res; | |
FLAG_C = FLAG_X = src << 8; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_lsr_16_al(void) | |
{ | |
uint ea = EA_AL_16(); | |
uint src = m68ki_read_16(ea); | |
uint res = src >> 1; | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_CLEAR; | |
FLAG_Z = res; | |
FLAG_C = FLAG_X = src << 8; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_lsl_8_s(void) | |
{ | |
uint* r_dst = &DY; | |
uint shift = (((REG_IR >> 9) - 1) & 7) + 1; | |
uint src = MASK_OUT_ABOVE_8(*r_dst); | |
uint res = MASK_OUT_ABOVE_8(src << shift); | |
*r_dst = MASK_OUT_BELOW_8(*r_dst) | res; | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_X = FLAG_C = src << shift; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_lsl_16_s(void) | |
{ | |
uint* r_dst = &DY; | |
uint shift = (((REG_IR >> 9) - 1) & 7) + 1; | |
uint src = MASK_OUT_ABOVE_16(*r_dst); | |
uint res = MASK_OUT_ABOVE_16(src << shift); | |
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res; | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_X = FLAG_C = src >> (8-shift); | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_lsl_32_s(void) | |
{ | |
uint* r_dst = &DY; | |
uint shift = (((REG_IR >> 9) - 1) & 7) + 1; | |
uint src = *r_dst; | |
uint res = MASK_OUT_ABOVE_32(src << shift); | |
*r_dst = res; | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_X = FLAG_C = src >> (24-shift); | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_lsl_8_r(void) | |
{ | |
uint* r_dst = &DY; | |
uint shift = DX & 0x3f; | |
uint src = MASK_OUT_ABOVE_8(*r_dst); | |
uint res = MASK_OUT_ABOVE_8(src << shift); | |
if(shift != 0) | |
{ | |
USE_CYCLES(shift<<CYC_SHIFT); | |
if(shift <= 8) | |
{ | |
*r_dst = MASK_OUT_BELOW_8(*r_dst) | res; | |
FLAG_X = FLAG_C = src << shift; | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
return; | |
} | |
*r_dst &= 0xffffff00; | |
FLAG_X = XFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_N = NFLAG_CLEAR; | |
FLAG_Z = ZFLAG_SET; | |
FLAG_V = VFLAG_CLEAR; | |
return; | |
} | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_N = NFLAG_8(src); | |
FLAG_Z = src; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_lsl_16_r(void) | |
{ | |
uint* r_dst = &DY; | |
uint shift = DX & 0x3f; | |
uint src = MASK_OUT_ABOVE_16(*r_dst); | |
uint res = MASK_OUT_ABOVE_16(src << shift); | |
if(shift != 0) | |
{ | |
USE_CYCLES(shift<<CYC_SHIFT); | |
if(shift <= 16) | |
{ | |
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res; | |
FLAG_X = FLAG_C = (src << shift) >> 8; | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
return; | |
} | |
*r_dst &= 0xffff0000; | |
FLAG_X = XFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_N = NFLAG_CLEAR; | |
FLAG_Z = ZFLAG_SET; | |
FLAG_V = VFLAG_CLEAR; | |
return; | |
} | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_N = NFLAG_16(src); | |
FLAG_Z = src; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_lsl_32_r(void) | |
{ | |
uint* r_dst = &DY; | |
uint shift = DX & 0x3f; | |
uint src = *r_dst; | |
uint res = MASK_OUT_ABOVE_32(src << shift); | |
if(shift != 0) | |
{ | |
USE_CYCLES(shift<<CYC_SHIFT); | |
if(shift < 32) | |
{ | |
*r_dst = res; | |
FLAG_X = FLAG_C = (src >> (32 - shift)) << 8; | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
return; | |
} | |
*r_dst = 0; | |
FLAG_X = FLAG_C = ((shift == 32 ? src & 1 : 0))<<8; | |
FLAG_N = NFLAG_CLEAR; | |
FLAG_Z = ZFLAG_SET; | |
FLAG_V = VFLAG_CLEAR; | |
return; | |
} | |
FLAG_C = CFLAG_CLEAR; | |
FLAG_N = NFLAG_32(src); | |
FLAG_Z = src; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_lsl_16_ai(void) | |
{ | |
uint ea = EA_AY_AI_16(); | |
uint src = m68ki_read_16(ea); | |
uint res = MASK_OUT_ABOVE_16(src << 1); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_X = FLAG_C = src >> 7; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_lsl_16_pi(void) | |
{ | |
uint ea = EA_AY_PI_16(); | |
uint src = m68ki_read_16(ea); | |
uint res = MASK_OUT_ABOVE_16(src << 1); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_X = FLAG_C = src >> 7; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_lsl_16_pd(void) | |
{ | |
uint ea = EA_AY_PD_16(); | |
uint src = m68ki_read_16(ea); | |
uint res = MASK_OUT_ABOVE_16(src << 1); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_X = FLAG_C = src >> 7; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_lsl_16_di(void) | |
{ | |
uint ea = EA_AY_DI_16(); | |
uint src = m68ki_read_16(ea); | |
uint res = MASK_OUT_ABOVE_16(src << 1); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_X = FLAG_C = src >> 7; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_lsl_16_ix(void) | |
{ | |
uint ea = EA_AY_IX_16(); | |
uint src = m68ki_read_16(ea); | |
uint res = MASK_OUT_ABOVE_16(src << 1); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_X = FLAG_C = src >> 7; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_lsl_16_aw(void) | |
{ | |
uint ea = EA_AW_16(); | |
uint src = m68ki_read_16(ea); | |
uint res = MASK_OUT_ABOVE_16(src << 1); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_X = FLAG_C = src >> 7; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_lsl_16_al(void) | |
{ | |
uint ea = EA_AL_16(); | |
uint src = m68ki_read_16(ea); | |
uint res = MASK_OUT_ABOVE_16(src << 1); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_X = FLAG_C = src >> 7; | |
FLAG_V = VFLAG_CLEAR; | |
} | |
void m68k_op_move_8_d_d(void) | |
{ | |
uint res = MASK_OUT_ABOVE_8(DY); | |
uint* r_dst = &DX; | |
*r_dst = MASK_OUT_BELOW_8(*r_dst) | res; | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_d_ai(void) | |
{ | |
uint res = OPER_AY_AI_8(); | |
uint* r_dst = &DX; | |
*r_dst = MASK_OUT_BELOW_8(*r_dst) | res; | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_d_pi(void) | |
{ | |
uint res = OPER_AY_PI_8(); | |
uint* r_dst = &DX; | |
*r_dst = MASK_OUT_BELOW_8(*r_dst) | res; | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_d_pi7(void) | |
{ | |
uint res = OPER_A7_PI_8(); | |
uint* r_dst = &DX; | |
*r_dst = MASK_OUT_BELOW_8(*r_dst) | res; | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_d_pd(void) | |
{ | |
uint res = OPER_AY_PD_8(); | |
uint* r_dst = &DX; | |
*r_dst = MASK_OUT_BELOW_8(*r_dst) | res; | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_d_pd7(void) | |
{ | |
uint res = OPER_A7_PD_8(); | |
uint* r_dst = &DX; | |
*r_dst = MASK_OUT_BELOW_8(*r_dst) | res; | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_d_di(void) | |
{ | |
uint res = OPER_AY_DI_8(); | |
uint* r_dst = &DX; | |
*r_dst = MASK_OUT_BELOW_8(*r_dst) | res; | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_d_ix(void) | |
{ | |
uint res = OPER_AY_IX_8(); | |
uint* r_dst = &DX; | |
*r_dst = MASK_OUT_BELOW_8(*r_dst) | res; | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_d_aw(void) | |
{ | |
uint res = OPER_AW_8(); | |
uint* r_dst = &DX; | |
*r_dst = MASK_OUT_BELOW_8(*r_dst) | res; | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_d_al(void) | |
{ | |
uint res = OPER_AL_8(); | |
uint* r_dst = &DX; | |
*r_dst = MASK_OUT_BELOW_8(*r_dst) | res; | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_d_pcdi(void) | |
{ | |
uint res = OPER_PCDI_8(); | |
uint* r_dst = &DX; | |
*r_dst = MASK_OUT_BELOW_8(*r_dst) | res; | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_d_pcix(void) | |
{ | |
uint res = OPER_PCIX_8(); | |
uint* r_dst = &DX; | |
*r_dst = MASK_OUT_BELOW_8(*r_dst) | res; | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_d_i(void) | |
{ | |
uint res = OPER_I_8(); | |
uint* r_dst = &DX; | |
*r_dst = MASK_OUT_BELOW_8(*r_dst) | res; | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_ai_d(void) | |
{ | |
uint res = MASK_OUT_ABOVE_8(DY); | |
uint ea = EA_AX_AI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_ai_ai(void) | |
{ | |
uint res = OPER_AY_AI_8(); | |
uint ea = EA_AX_AI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_ai_pi(void) | |
{ | |
uint res = OPER_AY_PI_8(); | |
uint ea = EA_AX_AI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_ai_pi7(void) | |
{ | |
uint res = OPER_A7_PI_8(); | |
uint ea = EA_AX_AI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_ai_pd(void) | |
{ | |
uint res = OPER_AY_PD_8(); | |
uint ea = EA_AX_AI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_ai_pd7(void) | |
{ | |
uint res = OPER_A7_PD_8(); | |
uint ea = EA_AX_AI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_ai_di(void) | |
{ | |
uint res = OPER_AY_DI_8(); | |
uint ea = EA_AX_AI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_ai_ix(void) | |
{ | |
uint res = OPER_AY_IX_8(); | |
uint ea = EA_AX_AI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_ai_aw(void) | |
{ | |
uint res = OPER_AW_8(); | |
uint ea = EA_AX_AI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_ai_al(void) | |
{ | |
uint res = OPER_AL_8(); | |
uint ea = EA_AX_AI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_ai_pcdi(void) | |
{ | |
uint res = OPER_PCDI_8(); | |
uint ea = EA_AX_AI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_ai_pcix(void) | |
{ | |
uint res = OPER_PCIX_8(); | |
uint ea = EA_AX_AI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_ai_i(void) | |
{ | |
uint res = OPER_I_8(); | |
uint ea = EA_AX_AI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pi7_d(void) | |
{ | |
uint res = MASK_OUT_ABOVE_8(DY); | |
uint ea = EA_A7_PI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pi_d(void) | |
{ | |
uint res = MASK_OUT_ABOVE_8(DY); | |
uint ea = EA_AX_PI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pi7_ai(void) | |
{ | |
uint res = OPER_AY_AI_8(); | |
uint ea = EA_A7_PI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pi7_pi(void) | |
{ | |
uint res = OPER_AY_PI_8(); | |
uint ea = EA_A7_PI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pi7_pi7(void) | |
{ | |
uint res = OPER_A7_PI_8(); | |
uint ea = EA_A7_PI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pi7_pd(void) | |
{ | |
uint res = OPER_AY_PD_8(); | |
uint ea = EA_A7_PI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pi7_pd7(void) | |
{ | |
uint res = OPER_A7_PD_8(); | |
uint ea = EA_A7_PI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pi7_di(void) | |
{ | |
uint res = OPER_AY_DI_8(); | |
uint ea = EA_A7_PI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pi7_ix(void) | |
{ | |
uint res = OPER_AY_IX_8(); | |
uint ea = EA_A7_PI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pi7_aw(void) | |
{ | |
uint res = OPER_AW_8(); | |
uint ea = EA_A7_PI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pi7_al(void) | |
{ | |
uint res = OPER_AL_8(); | |
uint ea = EA_A7_PI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pi7_pcdi(void) | |
{ | |
uint res = OPER_PCDI_8(); | |
uint ea = EA_A7_PI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pi7_pcix(void) | |
{ | |
uint res = OPER_PCIX_8(); | |
uint ea = EA_A7_PI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pi7_i(void) | |
{ | |
uint res = OPER_I_8(); | |
uint ea = EA_A7_PI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pi_ai(void) | |
{ | |
uint res = OPER_AY_AI_8(); | |
uint ea = EA_AX_PI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pi_pi(void) | |
{ | |
uint res = OPER_AY_PI_8(); | |
uint ea = EA_AX_PI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pi_pi7(void) | |
{ | |
uint res = OPER_A7_PI_8(); | |
uint ea = EA_AX_PI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pi_pd(void) | |
{ | |
uint res = OPER_AY_PD_8(); | |
uint ea = EA_AX_PI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pi_pd7(void) | |
{ | |
uint res = OPER_A7_PD_8(); | |
uint ea = EA_AX_PI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pi_di(void) | |
{ | |
uint res = OPER_AY_DI_8(); | |
uint ea = EA_AX_PI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pi_ix(void) | |
{ | |
uint res = OPER_AY_IX_8(); | |
uint ea = EA_AX_PI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pi_aw(void) | |
{ | |
uint res = OPER_AW_8(); | |
uint ea = EA_AX_PI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pi_al(void) | |
{ | |
uint res = OPER_AL_8(); | |
uint ea = EA_AX_PI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pi_pcdi(void) | |
{ | |
uint res = OPER_PCDI_8(); | |
uint ea = EA_AX_PI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pi_pcix(void) | |
{ | |
uint res = OPER_PCIX_8(); | |
uint ea = EA_AX_PI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pi_i(void) | |
{ | |
uint res = OPER_I_8(); | |
uint ea = EA_AX_PI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pd7_d(void) | |
{ | |
uint res = MASK_OUT_ABOVE_8(DY); | |
uint ea = EA_A7_PD_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pd_d(void) | |
{ | |
uint res = MASK_OUT_ABOVE_8(DY); | |
uint ea = EA_AX_PD_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pd7_ai(void) | |
{ | |
uint res = OPER_AY_AI_8(); | |
uint ea = EA_A7_PD_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pd7_pi(void) | |
{ | |
uint res = OPER_AY_PI_8(); | |
uint ea = EA_A7_PD_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pd7_pi7(void) | |
{ | |
uint res = OPER_A7_PI_8(); | |
uint ea = EA_A7_PD_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pd7_pd(void) | |
{ | |
uint res = OPER_AY_PD_8(); | |
uint ea = EA_A7_PD_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pd7_pd7(void) | |
{ | |
uint res = OPER_A7_PD_8(); | |
uint ea = EA_A7_PD_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pd7_di(void) | |
{ | |
uint res = OPER_AY_DI_8(); | |
uint ea = EA_A7_PD_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pd7_ix(void) | |
{ | |
uint res = OPER_AY_IX_8(); | |
uint ea = EA_A7_PD_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pd7_aw(void) | |
{ | |
uint res = OPER_AW_8(); | |
uint ea = EA_A7_PD_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pd7_al(void) | |
{ | |
uint res = OPER_AL_8(); | |
uint ea = EA_A7_PD_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pd7_pcdi(void) | |
{ | |
uint res = OPER_PCDI_8(); | |
uint ea = EA_A7_PD_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pd7_pcix(void) | |
{ | |
uint res = OPER_PCIX_8(); | |
uint ea = EA_A7_PD_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pd7_i(void) | |
{ | |
uint res = OPER_I_8(); | |
uint ea = EA_A7_PD_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pd_ai(void) | |
{ | |
uint res = OPER_AY_AI_8(); | |
uint ea = EA_AX_PD_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pd_pi(void) | |
{ | |
uint res = OPER_AY_PI_8(); | |
uint ea = EA_AX_PD_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pd_pi7(void) | |
{ | |
uint res = OPER_A7_PI_8(); | |
uint ea = EA_AX_PD_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pd_pd(void) | |
{ | |
uint res = OPER_AY_PD_8(); | |
uint ea = EA_AX_PD_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pd_pd7(void) | |
{ | |
uint res = OPER_A7_PD_8(); | |
uint ea = EA_AX_PD_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pd_di(void) | |
{ | |
uint res = OPER_AY_DI_8(); | |
uint ea = EA_AX_PD_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pd_ix(void) | |
{ | |
uint res = OPER_AY_IX_8(); | |
uint ea = EA_AX_PD_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pd_aw(void) | |
{ | |
uint res = OPER_AW_8(); | |
uint ea = EA_AX_PD_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pd_al(void) | |
{ | |
uint res = OPER_AL_8(); | |
uint ea = EA_AX_PD_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pd_pcdi(void) | |
{ | |
uint res = OPER_PCDI_8(); | |
uint ea = EA_AX_PD_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pd_pcix(void) | |
{ | |
uint res = OPER_PCIX_8(); | |
uint ea = EA_AX_PD_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_pd_i(void) | |
{ | |
uint res = OPER_I_8(); | |
uint ea = EA_AX_PD_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_di_d(void) | |
{ | |
uint res = MASK_OUT_ABOVE_8(DY); | |
uint ea = EA_AX_DI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_di_ai(void) | |
{ | |
uint res = OPER_AY_AI_8(); | |
uint ea = EA_AX_DI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_di_pi(void) | |
{ | |
uint res = OPER_AY_PI_8(); | |
uint ea = EA_AX_DI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_di_pi7(void) | |
{ | |
uint res = OPER_A7_PI_8(); | |
uint ea = EA_AX_DI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_di_pd(void) | |
{ | |
uint res = OPER_AY_PD_8(); | |
uint ea = EA_AX_DI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_di_pd7(void) | |
{ | |
uint res = OPER_A7_PD_8(); | |
uint ea = EA_AX_DI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_di_di(void) | |
{ | |
uint res = OPER_AY_DI_8(); | |
uint ea = EA_AX_DI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_di_ix(void) | |
{ | |
uint res = OPER_AY_IX_8(); | |
uint ea = EA_AX_DI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_di_aw(void) | |
{ | |
uint res = OPER_AW_8(); | |
uint ea = EA_AX_DI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_di_al(void) | |
{ | |
uint res = OPER_AL_8(); | |
uint ea = EA_AX_DI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_di_pcdi(void) | |
{ | |
uint res = OPER_PCDI_8(); | |
uint ea = EA_AX_DI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_di_pcix(void) | |
{ | |
uint res = OPER_PCIX_8(); | |
uint ea = EA_AX_DI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_di_i(void) | |
{ | |
uint res = OPER_I_8(); | |
uint ea = EA_AX_DI_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_ix_d(void) | |
{ | |
uint res = MASK_OUT_ABOVE_8(DY); | |
uint ea = EA_AX_IX_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_ix_ai(void) | |
{ | |
uint res = OPER_AY_AI_8(); | |
uint ea = EA_AX_IX_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_ix_pi(void) | |
{ | |
uint res = OPER_AY_PI_8(); | |
uint ea = EA_AX_IX_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_ix_pi7(void) | |
{ | |
uint res = OPER_A7_PI_8(); | |
uint ea = EA_AX_IX_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_ix_pd(void) | |
{ | |
uint res = OPER_AY_PD_8(); | |
uint ea = EA_AX_IX_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_ix_pd7(void) | |
{ | |
uint res = OPER_A7_PD_8(); | |
uint ea = EA_AX_IX_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_ix_di(void) | |
{ | |
uint res = OPER_AY_DI_8(); | |
uint ea = EA_AX_IX_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_ix_ix(void) | |
{ | |
uint res = OPER_AY_IX_8(); | |
uint ea = EA_AX_IX_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_ix_aw(void) | |
{ | |
uint res = OPER_AW_8(); | |
uint ea = EA_AX_IX_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_ix_al(void) | |
{ | |
uint res = OPER_AL_8(); | |
uint ea = EA_AX_IX_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_ix_pcdi(void) | |
{ | |
uint res = OPER_PCDI_8(); | |
uint ea = EA_AX_IX_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_ix_pcix(void) | |
{ | |
uint res = OPER_PCIX_8(); | |
uint ea = EA_AX_IX_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_ix_i(void) | |
{ | |
uint res = OPER_I_8(); | |
uint ea = EA_AX_IX_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_aw_d(void) | |
{ | |
uint res = MASK_OUT_ABOVE_8(DY); | |
uint ea = EA_AW_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_aw_ai(void) | |
{ | |
uint res = OPER_AY_AI_8(); | |
uint ea = EA_AW_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_aw_pi(void) | |
{ | |
uint res = OPER_AY_PI_8(); | |
uint ea = EA_AW_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_aw_pi7(void) | |
{ | |
uint res = OPER_A7_PI_8(); | |
uint ea = EA_AW_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_aw_pd(void) | |
{ | |
uint res = OPER_AY_PD_8(); | |
uint ea = EA_AW_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_aw_pd7(void) | |
{ | |
uint res = OPER_A7_PD_8(); | |
uint ea = EA_AW_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_aw_di(void) | |
{ | |
uint res = OPER_AY_DI_8(); | |
uint ea = EA_AW_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_aw_ix(void) | |
{ | |
uint res = OPER_AY_IX_8(); | |
uint ea = EA_AW_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_aw_aw(void) | |
{ | |
uint res = OPER_AW_8(); | |
uint ea = EA_AW_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_aw_al(void) | |
{ | |
uint res = OPER_AL_8(); | |
uint ea = EA_AW_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_aw_pcdi(void) | |
{ | |
uint res = OPER_PCDI_8(); | |
uint ea = EA_AW_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_aw_pcix(void) | |
{ | |
uint res = OPER_PCIX_8(); | |
uint ea = EA_AW_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_aw_i(void) | |
{ | |
uint res = OPER_I_8(); | |
uint ea = EA_AW_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_al_d(void) | |
{ | |
uint res = MASK_OUT_ABOVE_8(DY); | |
uint ea = EA_AL_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_al_ai(void) | |
{ | |
uint res = OPER_AY_AI_8(); | |
uint ea = EA_AL_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_al_pi(void) | |
{ | |
uint res = OPER_AY_PI_8(); | |
uint ea = EA_AL_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_al_pi7(void) | |
{ | |
uint res = OPER_A7_PI_8(); | |
uint ea = EA_AL_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_al_pd(void) | |
{ | |
uint res = OPER_AY_PD_8(); | |
uint ea = EA_AL_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_al_pd7(void) | |
{ | |
uint res = OPER_A7_PD_8(); | |
uint ea = EA_AL_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_al_di(void) | |
{ | |
uint res = OPER_AY_DI_8(); | |
uint ea = EA_AL_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_al_ix(void) | |
{ | |
uint res = OPER_AY_IX_8(); | |
uint ea = EA_AL_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_al_aw(void) | |
{ | |
uint res = OPER_AW_8(); | |
uint ea = EA_AL_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_al_al(void) | |
{ | |
uint res = OPER_AL_8(); | |
uint ea = EA_AL_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_al_pcdi(void) | |
{ | |
uint res = OPER_PCDI_8(); | |
uint ea = EA_AL_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_al_pcix(void) | |
{ | |
uint res = OPER_PCIX_8(); | |
uint ea = EA_AL_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_8_al_i(void) | |
{ | |
uint res = OPER_I_8(); | |
uint ea = EA_AL_8(); | |
m68ki_write_8(ea, res); | |
FLAG_N = NFLAG_8(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_d_d(void) | |
{ | |
uint res = MASK_OUT_ABOVE_16(DY); | |
uint* r_dst = &DX; | |
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res; | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_d_a(void) | |
{ | |
uint res = MASK_OUT_ABOVE_16(AY); | |
uint* r_dst = &DX; | |
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res; | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_d_ai(void) | |
{ | |
uint res = OPER_AY_AI_16(); | |
uint* r_dst = &DX; | |
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res; | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_d_pi(void) | |
{ | |
uint res = OPER_AY_PI_16(); | |
uint* r_dst = &DX; | |
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res; | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_d_pd(void) | |
{ | |
uint res = OPER_AY_PD_16(); | |
uint* r_dst = &DX; | |
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res; | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_d_di(void) | |
{ | |
uint res = OPER_AY_DI_16(); | |
uint* r_dst = &DX; | |
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res; | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_d_ix(void) | |
{ | |
uint res = OPER_AY_IX_16(); | |
uint* r_dst = &DX; | |
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res; | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_d_aw(void) | |
{ | |
uint res = OPER_AW_16(); | |
uint* r_dst = &DX; | |
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res; | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_d_al(void) | |
{ | |
uint res = OPER_AL_16(); | |
uint* r_dst = &DX; | |
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res; | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_d_pcdi(void) | |
{ | |
uint res = OPER_PCDI_16(); | |
uint* r_dst = &DX; | |
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res; | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_d_pcix(void) | |
{ | |
uint res = OPER_PCIX_16(); | |
uint* r_dst = &DX; | |
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res; | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_d_i(void) | |
{ | |
uint res = OPER_I_16(); | |
uint* r_dst = &DX; | |
*r_dst = MASK_OUT_BELOW_16(*r_dst) | res; | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_ai_d(void) | |
{ | |
uint res = MASK_OUT_ABOVE_16(DY); | |
uint ea = EA_AX_AI_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_ai_a(void) | |
{ | |
uint res = MASK_OUT_ABOVE_16(AY); | |
uint ea = EA_AX_AI_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_ai_ai(void) | |
{ | |
uint res = OPER_AY_AI_16(); | |
uint ea = EA_AX_AI_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_ai_pi(void) | |
{ | |
uint res = OPER_AY_PI_16(); | |
uint ea = EA_AX_AI_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_ai_pd(void) | |
{ | |
uint res = OPER_AY_PD_16(); | |
uint ea = EA_AX_AI_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_ai_di(void) | |
{ | |
uint res = OPER_AY_DI_16(); | |
uint ea = EA_AX_AI_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_ai_ix(void) | |
{ | |
uint res = OPER_AY_IX_16(); | |
uint ea = EA_AX_AI_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_ai_aw(void) | |
{ | |
uint res = OPER_AW_16(); | |
uint ea = EA_AX_AI_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_ai_al(void) | |
{ | |
uint res = OPER_AL_16(); | |
uint ea = EA_AX_AI_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_ai_pcdi(void) | |
{ | |
uint res = OPER_PCDI_16(); | |
uint ea = EA_AX_AI_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_ai_pcix(void) | |
{ | |
uint res = OPER_PCIX_16(); | |
uint ea = EA_AX_AI_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_ai_i(void) | |
{ | |
uint res = OPER_I_16(); | |
uint ea = EA_AX_AI_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_pi_d(void) | |
{ | |
uint res = MASK_OUT_ABOVE_16(DY); | |
uint ea = EA_AX_PI_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_pi_a(void) | |
{ | |
uint res = MASK_OUT_ABOVE_16(AY); | |
uint ea = EA_AX_PI_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_pi_ai(void) | |
{ | |
uint res = OPER_AY_AI_16(); | |
uint ea = EA_AX_PI_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_pi_pi(void) | |
{ | |
uint res = OPER_AY_PI_16(); | |
uint ea = EA_AX_PI_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_pi_pd(void) | |
{ | |
uint res = OPER_AY_PD_16(); | |
uint ea = EA_AX_PI_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_pi_di(void) | |
{ | |
uint res = OPER_AY_DI_16(); | |
uint ea = EA_AX_PI_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_pi_ix(void) | |
{ | |
uint res = OPER_AY_IX_16(); | |
uint ea = EA_AX_PI_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_pi_aw(void) | |
{ | |
uint res = OPER_AW_16(); | |
uint ea = EA_AX_PI_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_pi_al(void) | |
{ | |
uint res = OPER_AL_16(); | |
uint ea = EA_AX_PI_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_pi_pcdi(void) | |
{ | |
uint res = OPER_PCDI_16(); | |
uint ea = EA_AX_PI_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_pi_pcix(void) | |
{ | |
uint res = OPER_PCIX_16(); | |
uint ea = EA_AX_PI_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_pi_i(void) | |
{ | |
uint res = OPER_I_16(); | |
uint ea = EA_AX_PI_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_pd_d(void) | |
{ | |
uint res = MASK_OUT_ABOVE_16(DY); | |
uint ea = EA_AX_PD_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_pd_a(void) | |
{ | |
uint res = MASK_OUT_ABOVE_16(AY); | |
uint ea = EA_AX_PD_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_pd_ai(void) | |
{ | |
uint res = OPER_AY_AI_16(); | |
uint ea = EA_AX_PD_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_pd_pi(void) | |
{ | |
uint res = OPER_AY_PI_16(); | |
uint ea = EA_AX_PD_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_pd_pd(void) | |
{ | |
uint res = OPER_AY_PD_16(); | |
uint ea = EA_AX_PD_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_pd_di(void) | |
{ | |
uint res = OPER_AY_DI_16(); | |
uint ea = EA_AX_PD_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_pd_ix(void) | |
{ | |
uint res = OPER_AY_IX_16(); | |
uint ea = EA_AX_PD_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_pd_aw(void) | |
{ | |
uint res = OPER_AW_16(); | |
uint ea = EA_AX_PD_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_pd_al(void) | |
{ | |
uint res = OPER_AL_16(); | |
uint ea = EA_AX_PD_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_pd_pcdi(void) | |
{ | |
uint res = OPER_PCDI_16(); | |
uint ea = EA_AX_PD_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_pd_pcix(void) | |
{ | |
uint res = OPER_PCIX_16(); | |
uint ea = EA_AX_PD_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_pd_i(void) | |
{ | |
uint res = OPER_I_16(); | |
uint ea = EA_AX_PD_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_di_d(void) | |
{ | |
uint res = MASK_OUT_ABOVE_16(DY); | |
uint ea = EA_AX_DI_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_di_a(void) | |
{ | |
uint res = MASK_OUT_ABOVE_16(AY); | |
uint ea = EA_AX_DI_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_di_ai(void) | |
{ | |
uint res = OPER_AY_AI_16(); | |
uint ea = EA_AX_DI_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_di_pi(void) | |
{ | |
uint res = OPER_AY_PI_16(); | |
uint ea = EA_AX_DI_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_di_pd(void) | |
{ | |
uint res = OPER_AY_PD_16(); | |
uint ea = EA_AX_DI_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_di_di(void) | |
{ | |
uint res = OPER_AY_DI_16(); | |
uint ea = EA_AX_DI_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_di_ix(void) | |
{ | |
uint res = OPER_AY_IX_16(); | |
uint ea = EA_AX_DI_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_di_aw(void) | |
{ | |
uint res = OPER_AW_16(); | |
uint ea = EA_AX_DI_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_di_al(void) | |
{ | |
uint res = OPER_AL_16(); | |
uint ea = EA_AX_DI_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_di_pcdi(void) | |
{ | |
uint res = OPER_PCDI_16(); | |
uint ea = EA_AX_DI_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_di_pcix(void) | |
{ | |
uint res = OPER_PCIX_16(); | |
uint ea = EA_AX_DI_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_di_i(void) | |
{ | |
uint res = OPER_I_16(); | |
uint ea = EA_AX_DI_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_ix_d(void) | |
{ | |
uint res = MASK_OUT_ABOVE_16(DY); | |
uint ea = EA_AX_IX_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_ix_a(void) | |
{ | |
uint res = MASK_OUT_ABOVE_16(AY); | |
uint ea = EA_AX_IX_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_ix_ai(void) | |
{ | |
uint res = OPER_AY_AI_16(); | |
uint ea = EA_AX_IX_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_ix_pi(void) | |
{ | |
uint res = OPER_AY_PI_16(); | |
uint ea = EA_AX_IX_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_ix_pd(void) | |
{ | |
uint res = OPER_AY_PD_16(); | |
uint ea = EA_AX_IX_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_ix_di(void) | |
{ | |
uint res = OPER_AY_DI_16(); | |
uint ea = EA_AX_IX_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_ix_ix(void) | |
{ | |
uint res = OPER_AY_IX_16(); | |
uint ea = EA_AX_IX_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_ix_aw(void) | |
{ | |
uint res = OPER_AW_16(); | |
uint ea = EA_AX_IX_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_ix_al(void) | |
{ | |
uint res = OPER_AL_16(); | |
uint ea = EA_AX_IX_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_ix_pcdi(void) | |
{ | |
uint res = OPER_PCDI_16(); | |
uint ea = EA_AX_IX_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_ix_pcix(void) | |
{ | |
uint res = OPER_PCIX_16(); | |
uint ea = EA_AX_IX_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_ix_i(void) | |
{ | |
uint res = OPER_I_16(); | |
uint ea = EA_AX_IX_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_aw_d(void) | |
{ | |
uint res = MASK_OUT_ABOVE_16(DY); | |
uint ea = EA_AW_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_aw_a(void) | |
{ | |
uint res = MASK_OUT_ABOVE_16(AY); | |
uint ea = EA_AW_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_aw_ai(void) | |
{ | |
uint res = OPER_AY_AI_16(); | |
uint ea = EA_AW_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_aw_pi(void) | |
{ | |
uint res = OPER_AY_PI_16(); | |
uint ea = EA_AW_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_aw_pd(void) | |
{ | |
uint res = OPER_AY_PD_16(); | |
uint ea = EA_AW_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_aw_di(void) | |
{ | |
uint res = OPER_AY_DI_16(); | |
uint ea = EA_AW_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_aw_ix(void) | |
{ | |
uint res = OPER_AY_IX_16(); | |
uint ea = EA_AW_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_aw_aw(void) | |
{ | |
uint res = OPER_AW_16(); | |
uint ea = EA_AW_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_aw_al(void) | |
{ | |
uint res = OPER_AL_16(); | |
uint ea = EA_AW_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_aw_pcdi(void) | |
{ | |
uint res = OPER_PCDI_16(); | |
uint ea = EA_AW_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_aw_pcix(void) | |
{ | |
uint res = OPER_PCIX_16(); | |
uint ea = EA_AW_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_aw_i(void) | |
{ | |
uint res = OPER_I_16(); | |
uint ea = EA_AW_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_al_d(void) | |
{ | |
uint res = MASK_OUT_ABOVE_16(DY); | |
uint ea = EA_AL_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_al_a(void) | |
{ | |
uint res = MASK_OUT_ABOVE_16(AY); | |
uint ea = EA_AL_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_al_ai(void) | |
{ | |
uint res = OPER_AY_AI_16(); | |
uint ea = EA_AL_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_al_pi(void) | |
{ | |
uint res = OPER_AY_PI_16(); | |
uint ea = EA_AL_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_al_pd(void) | |
{ | |
uint res = OPER_AY_PD_16(); | |
uint ea = EA_AL_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_al_di(void) | |
{ | |
uint res = OPER_AY_DI_16(); | |
uint ea = EA_AL_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_al_ix(void) | |
{ | |
uint res = OPER_AY_IX_16(); | |
uint ea = EA_AL_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_al_aw(void) | |
{ | |
uint res = OPER_AW_16(); | |
uint ea = EA_AL_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_al_al(void) | |
{ | |
uint res = OPER_AL_16(); | |
uint ea = EA_AL_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_al_pcdi(void) | |
{ | |
uint res = OPER_PCDI_16(); | |
uint ea = EA_AL_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_al_pcix(void) | |
{ | |
uint res = OPER_PCIX_16(); | |
uint ea = EA_AL_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_16_al_i(void) | |
{ | |
uint res = OPER_I_16(); | |
uint ea = EA_AL_16(); | |
m68ki_write_16(ea, res); | |
FLAG_N = NFLAG_16(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_d_d(void) | |
{ | |
uint res = DY; | |
uint* r_dst = &DX; | |
*r_dst = res; | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_d_a(void) | |
{ | |
uint res = AY; | |
uint* r_dst = &DX; | |
*r_dst = res; | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_d_ai(void) | |
{ | |
uint res = OPER_AY_AI_32(); | |
uint* r_dst = &DX; | |
*r_dst = res; | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_d_pi(void) | |
{ | |
uint res = OPER_AY_PI_32(); | |
uint* r_dst = &DX; | |
*r_dst = res; | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_d_pd(void) | |
{ | |
uint res = OPER_AY_PD_32(); | |
uint* r_dst = &DX; | |
*r_dst = res; | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_d_di(void) | |
{ | |
uint res = OPER_AY_DI_32(); | |
uint* r_dst = &DX; | |
*r_dst = res; | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_d_ix(void) | |
{ | |
uint res = OPER_AY_IX_32(); | |
uint* r_dst = &DX; | |
*r_dst = res; | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_d_aw(void) | |
{ | |
uint res = OPER_AW_32(); | |
uint* r_dst = &DX; | |
*r_dst = res; | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_d_al(void) | |
{ | |
uint res = OPER_AL_32(); | |
uint* r_dst = &DX; | |
*r_dst = res; | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_d_pcdi(void) | |
{ | |
uint res = OPER_PCDI_32(); | |
uint* r_dst = &DX; | |
*r_dst = res; | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_d_pcix(void) | |
{ | |
uint res = OPER_PCIX_32(); | |
uint* r_dst = &DX; | |
*r_dst = res; | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_d_i(void) | |
{ | |
uint res = OPER_I_32(); | |
uint* r_dst = &DX; | |
*r_dst = res; | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_ai_d(void) | |
{ | |
uint res = DY; | |
uint ea = EA_AX_AI_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_ai_a(void) | |
{ | |
uint res = AY; | |
uint ea = EA_AX_AI_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_ai_ai(void) | |
{ | |
uint res = OPER_AY_AI_32(); | |
uint ea = EA_AX_AI_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_ai_pi(void) | |
{ | |
uint res = OPER_AY_PI_32(); | |
uint ea = EA_AX_AI_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_ai_pd(void) | |
{ | |
uint res = OPER_AY_PD_32(); | |
uint ea = EA_AX_AI_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_ai_di(void) | |
{ | |
uint res = OPER_AY_DI_32(); | |
uint ea = EA_AX_AI_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_ai_ix(void) | |
{ | |
uint res = OPER_AY_IX_32(); | |
uint ea = EA_AX_AI_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_ai_aw(void) | |
{ | |
uint res = OPER_AW_32(); | |
uint ea = EA_AX_AI_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_ai_al(void) | |
{ | |
uint res = OPER_AL_32(); | |
uint ea = EA_AX_AI_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_ai_pcdi(void) | |
{ | |
uint res = OPER_PCDI_32(); | |
uint ea = EA_AX_AI_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_ai_pcix(void) | |
{ | |
uint res = OPER_PCIX_32(); | |
uint ea = EA_AX_AI_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_ai_i(void) | |
{ | |
uint res = OPER_I_32(); | |
uint ea = EA_AX_AI_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_pi_d(void) | |
{ | |
uint res = DY; | |
uint ea = EA_AX_PI_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_pi_a(void) | |
{ | |
uint res = AY; | |
uint ea = EA_AX_PI_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_pi_ai(void) | |
{ | |
uint res = OPER_AY_AI_32(); | |
uint ea = EA_AX_PI_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_pi_pi(void) | |
{ | |
uint res = OPER_AY_PI_32(); | |
uint ea = EA_AX_PI_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_pi_pd(void) | |
{ | |
uint res = OPER_AY_PD_32(); | |
uint ea = EA_AX_PI_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_pi_di(void) | |
{ | |
uint res = OPER_AY_DI_32(); | |
uint ea = EA_AX_PI_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_pi_ix(void) | |
{ | |
uint res = OPER_AY_IX_32(); | |
uint ea = EA_AX_PI_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_pi_aw(void) | |
{ | |
uint res = OPER_AW_32(); | |
uint ea = EA_AX_PI_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_pi_al(void) | |
{ | |
uint res = OPER_AL_32(); | |
uint ea = EA_AX_PI_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_pi_pcdi(void) | |
{ | |
uint res = OPER_PCDI_32(); | |
uint ea = EA_AX_PI_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_pi_pcix(void) | |
{ | |
uint res = OPER_PCIX_32(); | |
uint ea = EA_AX_PI_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_pi_i(void) | |
{ | |
uint res = OPER_I_32(); | |
uint ea = EA_AX_PI_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_pd_d(void) | |
{ | |
uint res = DY; | |
uint ea = EA_AX_PD_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_pd_a(void) | |
{ | |
uint res = AY; | |
uint ea = EA_AX_PD_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_pd_ai(void) | |
{ | |
uint res = OPER_AY_AI_32(); | |
uint ea = EA_AX_PD_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_pd_pi(void) | |
{ | |
uint res = OPER_AY_PI_32(); | |
uint ea = EA_AX_PD_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_pd_pd(void) | |
{ | |
uint res = OPER_AY_PD_32(); | |
uint ea = EA_AX_PD_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_pd_di(void) | |
{ | |
uint res = OPER_AY_DI_32(); | |
uint ea = EA_AX_PD_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_pd_ix(void) | |
{ | |
uint res = OPER_AY_IX_32(); | |
uint ea = EA_AX_PD_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_pd_aw(void) | |
{ | |
uint res = OPER_AW_32(); | |
uint ea = EA_AX_PD_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_pd_al(void) | |
{ | |
uint res = OPER_AL_32(); | |
uint ea = EA_AX_PD_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_pd_pcdi(void) | |
{ | |
uint res = OPER_PCDI_32(); | |
uint ea = EA_AX_PD_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_pd_pcix(void) | |
{ | |
uint res = OPER_PCIX_32(); | |
uint ea = EA_AX_PD_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_pd_i(void) | |
{ | |
uint res = OPER_I_32(); | |
uint ea = EA_AX_PD_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_di_d(void) | |
{ | |
uint res = DY; | |
uint ea = EA_AX_DI_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_di_a(void) | |
{ | |
uint res = AY; | |
uint ea = EA_AX_DI_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_di_ai(void) | |
{ | |
uint res = OPER_AY_AI_32(); | |
uint ea = EA_AX_DI_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_di_pi(void) | |
{ | |
uint res = OPER_AY_PI_32(); | |
uint ea = EA_AX_DI_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_di_pd(void) | |
{ | |
uint res = OPER_AY_PD_32(); | |
uint ea = EA_AX_DI_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_di_di(void) | |
{ | |
uint res = OPER_AY_DI_32(); | |
uint ea = EA_AX_DI_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_di_ix(void) | |
{ | |
uint res = OPER_AY_IX_32(); | |
uint ea = EA_AX_DI_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_di_aw(void) | |
{ | |
uint res = OPER_AW_32(); | |
uint ea = EA_AX_DI_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_di_al(void) | |
{ | |
uint res = OPER_AL_32(); | |
uint ea = EA_AX_DI_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_di_pcdi(void) | |
{ | |
uint res = OPER_PCDI_32(); | |
uint ea = EA_AX_DI_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_di_pcix(void) | |
{ | |
uint res = OPER_PCIX_32(); | |
uint ea = EA_AX_DI_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_di_i(void) | |
{ | |
uint res = OPER_I_32(); | |
uint ea = EA_AX_DI_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_ix_d(void) | |
{ | |
uint res = DY; | |
uint ea = EA_AX_IX_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_ix_a(void) | |
{ | |
uint res = AY; | |
uint ea = EA_AX_IX_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_ix_ai(void) | |
{ | |
uint res = OPER_AY_AI_32(); | |
uint ea = EA_AX_IX_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_ix_pi(void) | |
{ | |
uint res = OPER_AY_PI_32(); | |
uint ea = EA_AX_IX_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_ix_pd(void) | |
{ | |
uint res = OPER_AY_PD_32(); | |
uint ea = EA_AX_IX_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_ix_di(void) | |
{ | |
uint res = OPER_AY_DI_32(); | |
uint ea = EA_AX_IX_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_ix_ix(void) | |
{ | |
uint res = OPER_AY_IX_32(); | |
uint ea = EA_AX_IX_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_ix_aw(void) | |
{ | |
uint res = OPER_AW_32(); | |
uint ea = EA_AX_IX_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_ix_al(void) | |
{ | |
uint res = OPER_AL_32(); | |
uint ea = EA_AX_IX_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_ix_pcdi(void) | |
{ | |
uint res = OPER_PCDI_32(); | |
uint ea = EA_AX_IX_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_ix_pcix(void) | |
{ | |
uint res = OPER_PCIX_32(); | |
uint ea = EA_AX_IX_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_ix_i(void) | |
{ | |
uint res = OPER_I_32(); | |
uint ea = EA_AX_IX_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_aw_d(void) | |
{ | |
uint res = DY; | |
uint ea = EA_AW_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_aw_a(void) | |
{ | |
uint res = AY; | |
uint ea = EA_AW_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_aw_ai(void) | |
{ | |
uint res = OPER_AY_AI_32(); | |
uint ea = EA_AW_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_aw_pi(void) | |
{ | |
uint res = OPER_AY_PI_32(); | |
uint ea = EA_AW_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_aw_pd(void) | |
{ | |
uint res = OPER_AY_PD_32(); | |
uint ea = EA_AW_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_aw_di(void) | |
{ | |
uint res = OPER_AY_DI_32(); | |
uint ea = EA_AW_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_aw_ix(void) | |
{ | |
uint res = OPER_AY_IX_32(); | |
uint ea = EA_AW_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_aw_aw(void) | |
{ | |
uint res = OPER_AW_32(); | |
uint ea = EA_AW_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_aw_al(void) | |
{ | |
uint res = OPER_AL_32(); | |
uint ea = EA_AW_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_aw_pcdi(void) | |
{ | |
uint res = OPER_PCDI_32(); | |
uint ea = EA_AW_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_aw_pcix(void) | |
{ | |
uint res = OPER_PCIX_32(); | |
uint ea = EA_AW_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_aw_i(void) | |
{ | |
uint res = OPER_I_32(); | |
uint ea = EA_AW_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_al_d(void) | |
{ | |
uint res = DY; | |
uint ea = EA_AL_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_al_a(void) | |
{ | |
uint res = AY; | |
uint ea = EA_AL_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_al_ai(void) | |
{ | |
uint res = OPER_AY_AI_32(); | |
uint ea = EA_AL_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_al_pi(void) | |
{ | |
uint res = OPER_AY_PI_32(); | |
uint ea = EA_AL_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_al_pd(void) | |
{ | |
uint res = OPER_AY_PD_32(); | |
uint ea = EA_AL_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_al_di(void) | |
{ | |
uint res = OPER_AY_DI_32(); | |
uint ea = EA_AL_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_al_ix(void) | |
{ | |
uint res = OPER_AY_IX_32(); | |
uint ea = EA_AL_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_al_aw(void) | |
{ | |
uint res = OPER_AW_32(); | |
uint ea = EA_AL_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_al_al(void) | |
{ | |
uint res = OPER_AL_32(); | |
uint ea = EA_AL_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_al_pcdi(void) | |
{ | |
uint res = OPER_PCDI_32(); | |
uint ea = EA_AL_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_al_pcix(void) | |
{ | |
uint res = OPER_PCIX_32(); | |
uint ea = EA_AL_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_move_32_al_i(void) | |
{ | |
uint res = OPER_I_32(); | |
uint ea = EA_AL_32(); | |
m68ki_write_32(ea, res); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_movea_16_d(void) | |
{ | |
AX = MAKE_INT_16(DY); | |
} | |
void m68k_op_movea_16_a(void) | |
{ | |
AX = MAKE_INT_16(AY); | |
} | |
void m68k_op_movea_16_ai(void) | |
{ | |
AX = MAKE_INT_16(OPER_AY_AI_16()); | |
} | |
void m68k_op_movea_16_pi(void) | |
{ | |
AX = MAKE_INT_16(OPER_AY_PI_16()); | |
} | |
void m68k_op_movea_16_pd(void) | |
{ | |
AX = MAKE_INT_16(OPER_AY_PD_16()); | |
} | |
void m68k_op_movea_16_di(void) | |
{ | |
AX = MAKE_INT_16(OPER_AY_DI_16()); | |
} | |
void m68k_op_movea_16_ix(void) | |
{ | |
AX = MAKE_INT_16(OPER_AY_IX_16()); | |
} | |
void m68k_op_movea_16_aw(void) | |
{ | |
AX = MAKE_INT_16(OPER_AW_16()); | |
} | |
void m68k_op_movea_16_al(void) | |
{ | |
AX = MAKE_INT_16(OPER_AL_16()); | |
} | |
void m68k_op_movea_16_pcdi(void) | |
{ | |
AX = MAKE_INT_16(OPER_PCDI_16()); | |
} | |
void m68k_op_movea_16_pcix(void) | |
{ | |
AX = MAKE_INT_16(OPER_PCIX_16()); | |
} | |
void m68k_op_movea_16_i(void) | |
{ | |
AX = MAKE_INT_16(OPER_I_16()); | |
} | |
void m68k_op_movea_32_d(void) | |
{ | |
AX = DY; | |
} | |
void m68k_op_movea_32_a(void) | |
{ | |
AX = AY; | |
} | |
void m68k_op_movea_32_ai(void) | |
{ | |
AX = OPER_AY_AI_32(); | |
} | |
void m68k_op_movea_32_pi(void) | |
{ | |
AX = OPER_AY_PI_32(); | |
} | |
void m68k_op_movea_32_pd(void) | |
{ | |
AX = OPER_AY_PD_32(); | |
} | |
void m68k_op_movea_32_di(void) | |
{ | |
AX = OPER_AY_DI_32(); | |
} | |
void m68k_op_movea_32_ix(void) | |
{ | |
AX = OPER_AY_IX_32(); | |
} | |
void m68k_op_movea_32_aw(void) | |
{ | |
AX = OPER_AW_32(); | |
} | |
void m68k_op_movea_32_al(void) | |
{ | |
AX = OPER_AL_32(); | |
} | |
void m68k_op_movea_32_pcdi(void) | |
{ | |
AX = OPER_PCDI_32(); | |
} | |
void m68k_op_movea_32_pcix(void) | |
{ | |
AX = OPER_PCIX_32(); | |
} | |
void m68k_op_movea_32_i(void) | |
{ | |
AX = OPER_I_32(); | |
} | |
void m68k_op_move_16_frc_d(void) | |
{ | |
if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) | |
{ | |
DY = MASK_OUT_BELOW_16(DY) | m68ki_get_ccr(); | |
return; | |
} | |
m68ki_exception_illegal(); | |
} | |
void m68k_op_move_16_frc_ai(void) | |
{ | |
if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) | |
{ | |
m68ki_write_16(EA_AY_AI_16(), m68ki_get_ccr()); | |
return; | |
} | |
m68ki_exception_illegal(); | |
} | |
void m68k_op_move_16_frc_pi(void) | |
{ | |
if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) | |
{ | |
m68ki_write_16(EA_AY_PI_16(), m68ki_get_ccr()); | |
return; | |
} | |
m68ki_exception_illegal(); | |
} | |
void m68k_op_move_16_frc_pd(void) | |
{ | |
if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) | |
{ | |
m68ki_write_16(EA_AY_PD_16(), m68ki_get_ccr()); | |
return; | |
} | |
m68ki_exception_illegal(); | |
} | |
void m68k_op_move_16_frc_di(void) | |
{ | |
if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) | |
{ | |
m68ki_write_16(EA_AY_DI_16(), m68ki_get_ccr()); | |
return; | |
} | |
m68ki_exception_illegal(); | |
} | |
void m68k_op_move_16_frc_ix(void) | |
{ | |
if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) | |
{ | |
m68ki_write_16(EA_AY_IX_16(), m68ki_get_ccr()); | |
return; | |
} | |
m68ki_exception_illegal(); | |
} | |
void m68k_op_move_16_frc_aw(void) | |
{ | |
if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) | |
{ | |
m68ki_write_16(EA_AW_16(), m68ki_get_ccr()); | |
return; | |
} | |
m68ki_exception_illegal(); | |
} | |
void m68k_op_move_16_frc_al(void) | |
{ | |
if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) | |
{ | |
m68ki_write_16(EA_AL_16(), m68ki_get_ccr()); | |
return; | |
} | |
m68ki_exception_illegal(); | |
} | |
void m68k_op_move_16_toc_d(void) | |
{ | |
m68ki_set_ccr(DY); | |
} | |
void m68k_op_move_16_toc_ai(void) | |
{ | |
m68ki_set_ccr(OPER_AY_AI_16()); | |
} | |
void m68k_op_move_16_toc_pi(void) | |
{ | |
m68ki_set_ccr(OPER_AY_PI_16()); | |
} | |
void m68k_op_move_16_toc_pd(void) | |
{ | |
m68ki_set_ccr(OPER_AY_PD_16()); | |
} | |
void m68k_op_move_16_toc_di(void) | |
{ | |
m68ki_set_ccr(OPER_AY_DI_16()); | |
} | |
void m68k_op_move_16_toc_ix(void) | |
{ | |
m68ki_set_ccr(OPER_AY_IX_16()); | |
} | |
void m68k_op_move_16_toc_aw(void) | |
{ | |
m68ki_set_ccr(OPER_AW_16()); | |
} | |
void m68k_op_move_16_toc_al(void) | |
{ | |
m68ki_set_ccr(OPER_AL_16()); | |
} | |
void m68k_op_move_16_toc_pcdi(void) | |
{ | |
m68ki_set_ccr(OPER_PCDI_16()); | |
} | |
void m68k_op_move_16_toc_pcix(void) | |
{ | |
m68ki_set_ccr(OPER_PCIX_16()); | |
} | |
void m68k_op_move_16_toc_i(void) | |
{ | |
m68ki_set_ccr(OPER_I_16()); | |
} | |
void m68k_op_move_16_frs_d(void) | |
{ | |
if(CPU_TYPE_IS_000(CPU_TYPE) || FLAG_S) /* NS990408 */ | |
{ | |
DY = MASK_OUT_BELOW_16(DY) | m68ki_get_sr(); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
} | |
void m68k_op_move_16_frs_ai(void) | |
{ | |
if(CPU_TYPE_IS_000(CPU_TYPE) || FLAG_S) /* NS990408 */ | |
{ | |
uint ea = EA_AY_AI_16(); | |
m68ki_write_16(ea, m68ki_get_sr()); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
} | |
void m68k_op_move_16_frs_pi(void) | |
{ | |
if(CPU_TYPE_IS_000(CPU_TYPE) || FLAG_S) /* NS990408 */ | |
{ | |
uint ea = EA_AY_PI_16(); | |
m68ki_write_16(ea, m68ki_get_sr()); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
} | |
void m68k_op_move_16_frs_pd(void) | |
{ | |
if(CPU_TYPE_IS_000(CPU_TYPE) || FLAG_S) /* NS990408 */ | |
{ | |
uint ea = EA_AY_PD_16(); | |
m68ki_write_16(ea, m68ki_get_sr()); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
} | |
void m68k_op_move_16_frs_di(void) | |
{ | |
if(CPU_TYPE_IS_000(CPU_TYPE) || FLAG_S) /* NS990408 */ | |
{ | |
uint ea = EA_AY_DI_16(); | |
m68ki_write_16(ea, m68ki_get_sr()); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
} | |
void m68k_op_move_16_frs_ix(void) | |
{ | |
if(CPU_TYPE_IS_000(CPU_TYPE) || FLAG_S) /* NS990408 */ | |
{ | |
uint ea = EA_AY_IX_16(); | |
m68ki_write_16(ea, m68ki_get_sr()); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
} | |
void m68k_op_move_16_frs_aw(void) | |
{ | |
if(CPU_TYPE_IS_000(CPU_TYPE) || FLAG_S) /* NS990408 */ | |
{ | |
uint ea = EA_AW_16(); | |
m68ki_write_16(ea, m68ki_get_sr()); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
} | |
void m68k_op_move_16_frs_al(void) | |
{ | |
if(CPU_TYPE_IS_000(CPU_TYPE) || FLAG_S) /* NS990408 */ | |
{ | |
uint ea = EA_AL_16(); | |
m68ki_write_16(ea, m68ki_get_sr()); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
} | |
void m68k_op_move_16_tos_d(void) | |
{ | |
if(FLAG_S) | |
{ | |
m68ki_set_sr(DY); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
} | |
void m68k_op_move_16_tos_ai(void) | |
{ | |
if(FLAG_S) | |
{ | |
uint new_sr = OPER_AY_AI_16(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
m68ki_set_sr(new_sr); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
} | |
void m68k_op_move_16_tos_pi(void) | |
{ | |
if(FLAG_S) | |
{ | |
uint new_sr = OPER_AY_PI_16(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
m68ki_set_sr(new_sr); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
} | |
void m68k_op_move_16_tos_pd(void) | |
{ | |
if(FLAG_S) | |
{ | |
uint new_sr = OPER_AY_PD_16(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
m68ki_set_sr(new_sr); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
} | |
void m68k_op_move_16_tos_di(void) | |
{ | |
if(FLAG_S) | |
{ | |
uint new_sr = OPER_AY_DI_16(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
m68ki_set_sr(new_sr); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
} | |
void m68k_op_move_16_tos_ix(void) | |
{ | |
if(FLAG_S) | |
{ | |
uint new_sr = OPER_AY_IX_16(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
m68ki_set_sr(new_sr); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
} | |
void m68k_op_move_16_tos_aw(void) | |
{ | |
if(FLAG_S) | |
{ | |
uint new_sr = OPER_AW_16(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
m68ki_set_sr(new_sr); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
} | |
void m68k_op_move_16_tos_al(void) | |
{ | |
if(FLAG_S) | |
{ | |
uint new_sr = OPER_AL_16(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
m68ki_set_sr(new_sr); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
} | |
void m68k_op_move_16_tos_pcdi(void) | |
{ | |
if(FLAG_S) | |
{ | |
uint new_sr = OPER_PCDI_16(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
m68ki_set_sr(new_sr); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
} | |
void m68k_op_move_16_tos_pcix(void) | |
{ | |
if(FLAG_S) | |
{ | |
uint new_sr = OPER_PCIX_16(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
m68ki_set_sr(new_sr); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
} | |
void m68k_op_move_16_tos_i(void) | |
{ | |
if(FLAG_S) | |
{ | |
uint new_sr = OPER_I_16(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
m68ki_set_sr(new_sr); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
} | |
void m68k_op_move_32_fru(void) | |
{ | |
if(FLAG_S) | |
{ | |
AY = REG_USP; | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
} | |
void m68k_op_move_32_tou(void) | |
{ | |
if(FLAG_S) | |
{ | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
REG_USP = AY; | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
} | |
void m68k_op_movec_32_cr(void) | |
{ | |
if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) | |
{ | |
if(FLAG_S) | |
{ | |
uint word2 = OPER_I_16(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
switch (word2 & 0xfff) | |
{ | |
case 0x000: /* SFC */ | |
REG_DA[(word2 >> 12) & 15] = REG_SFC; | |
return; | |
case 0x001: /* DFC */ | |
REG_DA[(word2 >> 12) & 15] = REG_DFC; | |
return; | |
case 0x002: /* CACR */ | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
REG_DA[(word2 >> 12) & 15] = REG_CACR; | |
return; | |
} | |
return; | |
case 0x800: /* USP */ | |
REG_DA[(word2 >> 12) & 15] = REG_USP; | |
return; | |
case 0x801: /* VBR */ | |
REG_DA[(word2 >> 12) & 15] = REG_VBR; | |
return; | |
case 0x802: /* CAAR */ | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
REG_DA[(word2 >> 12) & 15] = REG_CAAR; | |
return; | |
} | |
m68ki_exception_illegal(); | |
break; | |
case 0x803: /* MSP */ | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
REG_DA[(word2 >> 12) & 15] = FLAG_M ? REG_SP : REG_MSP; | |
return; | |
} | |
m68ki_exception_illegal(); | |
return; | |
case 0x804: /* ISP */ | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
REG_DA[(word2 >> 12) & 15] = FLAG_M ? REG_ISP : REG_SP; | |
return; | |
} | |
m68ki_exception_illegal(); | |
return; | |
default: | |
m68ki_exception_illegal(); | |
return; | |
} | |
} | |
m68ki_exception_privilege_violation(); | |
return; | |
} | |
m68ki_exception_illegal(); | |
} | |
void m68k_op_movec_32_rc(void) | |
{ | |
if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) | |
{ | |
if(FLAG_S) | |
{ | |
uint word2 = OPER_I_16(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
switch (word2 & 0xfff) | |
{ | |
case 0x000: /* SFC */ | |
REG_SFC = REG_DA[(word2 >> 12) & 15] & 7; | |
return; | |
case 0x001: /* DFC */ | |
REG_DFC = REG_DA[(word2 >> 12) & 15] & 7; | |
return; | |
case 0x002: /* CACR */ | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
REG_CACR = REG_DA[(word2 >> 12) & 15]; | |
return; | |
} | |
m68ki_exception_illegal(); | |
return; | |
case 0x800: /* USP */ | |
REG_USP = REG_DA[(word2 >> 12) & 15]; | |
return; | |
case 0x801: /* VBR */ | |
REG_VBR = REG_DA[(word2 >> 12) & 15]; | |
return; | |
case 0x802: /* CAAR */ | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
REG_CAAR = REG_DA[(word2 >> 12) & 15]; | |
return; | |
} | |
m68ki_exception_illegal(); | |
return; | |
case 0x803: /* MSP */ | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
/* we are in supervisor mode so just check for M flag */ | |
if(!FLAG_M) | |
{ | |
REG_MSP = REG_DA[(word2 >> 12) & 15]; | |
return; | |
} | |
REG_SP = REG_DA[(word2 >> 12) & 15]; | |
return; | |
} | |
m68ki_exception_illegal(); | |
return; | |
case 0x804: /* ISP */ | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
if(!FLAG_M) | |
{ | |
REG_SP = REG_DA[(word2 >> 12) & 15]; | |
return; | |
} | |
REG_ISP = REG_DA[(word2 >> 12) & 15]; | |
return; | |
} | |
m68ki_exception_illegal(); | |
return; | |
default: | |
m68ki_exception_illegal(); | |
return; | |
} | |
} | |
m68ki_exception_privilege_violation(); | |
return; | |
} | |
m68ki_exception_illegal(); | |
} | |
void m68k_op_movem_16_re_pd(void) | |
{ | |
uint i = 0; | |
uint register_list = OPER_I_16(); | |
uint ea = AY; | |
uint count = 0; | |
for(; i < 16; i++) | |
if(register_list & (1 << i)) | |
{ | |
ea -= 2; | |
m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_DA[15-i])); | |
count++; | |
} | |
AY = ea; | |
USE_CYCLES(count<<CYC_MOVEM_W); | |
} | |
void m68k_op_movem_16_re_ai(void) | |
{ | |
uint i = 0; | |
uint register_list = OPER_I_16(); | |
uint ea = EA_AY_AI_16(); | |
uint count = 0; | |
for(; i < 16; i++) | |
if(register_list & (1 << i)) | |
{ | |
m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_DA[i])); | |
ea += 2; | |
count++; | |
} | |
USE_CYCLES(count<<CYC_MOVEM_W); | |
} | |
void m68k_op_movem_16_re_di(void) | |
{ | |
uint i = 0; | |
uint register_list = OPER_I_16(); | |
uint ea = EA_AY_DI_16(); | |
uint count = 0; | |
for(; i < 16; i++) | |
if(register_list & (1 << i)) | |
{ | |
m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_DA[i])); | |
ea += 2; | |
count++; | |
} | |
USE_CYCLES(count<<CYC_MOVEM_W); | |
} | |
void m68k_op_movem_16_re_ix(void) | |
{ | |
uint i = 0; | |
uint register_list = OPER_I_16(); | |
uint ea = EA_AY_IX_16(); | |
uint count = 0; | |
for(; i < 16; i++) | |
if(register_list & (1 << i)) | |
{ | |
m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_DA[i])); | |
ea += 2; | |
count++; | |
} | |
USE_CYCLES(count<<CYC_MOVEM_W); | |
} | |
void m68k_op_movem_16_re_aw(void) | |
{ | |
uint i = 0; | |
uint register_list = OPER_I_16(); | |
uint ea = EA_AW_16(); | |
uint count = 0; | |
for(; i < 16; i++) | |
if(register_list & (1 << i)) | |
{ | |
m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_DA[i])); | |
ea += 2; | |
count++; | |
} | |
USE_CYCLES(count<<CYC_MOVEM_W); | |
} | |
void m68k_op_movem_16_re_al(void) | |
{ | |
uint i = 0; | |
uint register_list = OPER_I_16(); | |
uint ea = EA_AL_16(); | |
uint count = 0; | |
for(; i < 16; i++) | |
if(register_list & (1 << i)) | |
{ | |
m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_DA[i])); | |
ea += 2; | |
count++; | |
} | |
USE_CYCLES(count<<CYC_MOVEM_W); | |
} | |
void m68k_op_movem_32_re_pd(void) | |
{ | |
uint i = 0; | |
uint register_list = OPER_I_16(); | |
uint ea = AY; | |
uint count = 0; | |
for(; i < 16; i++) | |
if(register_list & (1 << i)) | |
{ | |
ea -= 4; | |
m68ki_write_32(ea, REG_DA[15-i]); | |
count++; | |
} | |
AY = ea; | |
USE_CYCLES(count<<CYC_MOVEM_L); | |
} | |
void m68k_op_movem_32_re_ai(void) | |
{ | |
uint i = 0; | |
uint register_list = OPER_I_16(); | |
uint ea = EA_AY_AI_32(); | |
uint count = 0; | |
for(; i < 16; i++) | |
if(register_list & (1 << i)) | |
{ | |
m68ki_write_32(ea, REG_DA[i]); | |
ea += 4; | |
count++; | |
} | |
USE_CYCLES(count<<CYC_MOVEM_L); | |
} | |
void m68k_op_movem_32_re_di(void) | |
{ | |
uint i = 0; | |
uint register_list = OPER_I_16(); | |
uint ea = EA_AY_DI_32(); | |
uint count = 0; | |
for(; i < 16; i++) | |
if(register_list & (1 << i)) | |
{ | |
m68ki_write_32(ea, REG_DA[i]); | |
ea += 4; | |
count++; | |
} | |
USE_CYCLES(count<<CYC_MOVEM_L); | |
} | |
void m68k_op_movem_32_re_ix(void) | |
{ | |
uint i = 0; | |
uint register_list = OPER_I_16(); | |
uint ea = EA_AY_IX_32(); | |
uint count = 0; | |
for(; i < 16; i++) | |
if(register_list & (1 << i)) | |
{ | |
m68ki_write_32(ea, REG_DA[i]); | |
ea += 4; | |
count++; | |
} | |
USE_CYCLES(count<<CYC_MOVEM_L); | |
} | |
void m68k_op_movem_32_re_aw(void) | |
{ | |
uint i = 0; | |
uint register_list = OPER_I_16(); | |
uint ea = EA_AW_32(); | |
uint count = 0; | |
for(; i < 16; i++) | |
if(register_list & (1 << i)) | |
{ | |
m68ki_write_32(ea, REG_DA[i]); | |
ea += 4; | |
count++; | |
} | |
USE_CYCLES(count<<CYC_MOVEM_L); | |
} | |
void m68k_op_movem_32_re_al(void) | |
{ | |
uint i = 0; | |
uint register_list = OPER_I_16(); | |
uint ea = EA_AL_32(); | |
uint count = 0; | |
for(; i < 16; i++) | |
if(register_list & (1 << i)) | |
{ | |
m68ki_write_32(ea, REG_DA[i]); | |
ea += 4; | |
count++; | |
} | |
USE_CYCLES(count<<CYC_MOVEM_L); | |
} | |
void m68k_op_movem_16_er_pi(void) | |
{ | |
uint i = 0; | |
uint register_list = OPER_I_16(); | |
uint ea = AY; | |
uint count = 0; | |
for(; i < 16; i++) | |
if(register_list & (1 << i)) | |
{ | |
REG_DA[i] = MAKE_INT_16(MASK_OUT_ABOVE_16(m68ki_read_16(ea))); | |
ea += 2; | |
count++; | |
} | |
AY = ea; | |
USE_CYCLES(count<<CYC_MOVEM_W); | |
} | |
void m68k_op_movem_16_er_ai(void) | |
{ | |
uint i = 0; | |
uint register_list = OPER_I_16(); | |
uint ea = EA_AY_AI_16(); | |
uint count = 0; | |
for(; i < 16; i++) | |
if(register_list & (1 << i)) | |
{ | |
REG_DA[i] = MAKE_INT_16(MASK_OUT_ABOVE_16(m68ki_read_16(ea))); | |
ea += 2; | |
count++; | |
} | |
USE_CYCLES(count<<CYC_MOVEM_W); | |
} | |
void m68k_op_movem_16_er_di(void) | |
{ | |
uint i = 0; | |
uint register_list = OPER_I_16(); | |
uint ea = EA_AY_DI_16(); | |
uint count = 0; | |
for(; i < 16; i++) | |
if(register_list & (1 << i)) | |
{ | |
REG_DA[i] = MAKE_INT_16(MASK_OUT_ABOVE_16(m68ki_read_16(ea))); | |
ea += 2; | |
count++; | |
} | |
USE_CYCLES(count<<CYC_MOVEM_W); | |
} | |
void m68k_op_movem_16_er_ix(void) | |
{ | |
uint i = 0; | |
uint register_list = OPER_I_16(); | |
uint ea = EA_AY_IX_16(); | |
uint count = 0; | |
for(; i < 16; i++) | |
if(register_list & (1 << i)) | |
{ | |
REG_DA[i] = MAKE_INT_16(MASK_OUT_ABOVE_16(m68ki_read_16(ea))); | |
ea += 2; | |
count++; | |
} | |
USE_CYCLES(count<<CYC_MOVEM_W); | |
} | |
void m68k_op_movem_16_er_aw(void) | |
{ | |
uint i = 0; | |
uint register_list = OPER_I_16(); | |
uint ea = EA_AW_16(); | |
uint count = 0; | |
for(; i < 16; i++) | |
if(register_list & (1 << i)) | |
{ | |
REG_DA[i] = MAKE_INT_16(MASK_OUT_ABOVE_16(m68ki_read_16(ea))); | |
ea += 2; | |
count++; | |
} | |
USE_CYCLES(count<<CYC_MOVEM_W); | |
} | |
void m68k_op_movem_16_er_al(void) | |
{ | |
uint i = 0; | |
uint register_list = OPER_I_16(); | |
uint ea = EA_AL_16(); | |
uint count = 0; | |
for(; i < 16; i++) | |
if(register_list & (1 << i)) | |
{ | |
REG_DA[i] = MAKE_INT_16(MASK_OUT_ABOVE_16(m68ki_read_16(ea))); | |
ea += 2; | |
count++; | |
} | |
USE_CYCLES(count<<CYC_MOVEM_W); | |
} | |
void m68k_op_movem_16_er_pcdi(void) | |
{ | |
uint i = 0; | |
uint register_list = OPER_I_16(); | |
uint ea = EA_PCDI_16(); | |
uint count = 0; | |
for(; i < 16; i++) | |
if(register_list & (1 << i)) | |
{ | |
REG_DA[i] = MAKE_INT_16(MASK_OUT_ABOVE_16(m68ki_read_16(ea))); | |
ea += 2; | |
count++; | |
} | |
USE_CYCLES(count<<CYC_MOVEM_W); | |
} | |
void m68k_op_movem_16_er_pcix(void) | |
{ | |
uint i = 0; | |
uint register_list = OPER_I_16(); | |
uint ea = EA_PCIX_16(); | |
uint count = 0; | |
for(; i < 16; i++) | |
if(register_list & (1 << i)) | |
{ | |
REG_DA[i] = MAKE_INT_16(MASK_OUT_ABOVE_16(m68ki_read_16(ea))); | |
ea += 2; | |
count++; | |
} | |
USE_CYCLES(count<<CYC_MOVEM_W); | |
} | |
void m68k_op_movem_32_er_pi(void) | |
{ | |
uint i = 0; | |
uint register_list = OPER_I_16(); | |
uint ea = AY; | |
uint count = 0; | |
for(; i < 16; i++) | |
if(register_list & (1 << i)) | |
{ | |
REG_DA[i] = m68ki_read_32(ea); | |
ea += 4; | |
count++; | |
} | |
AY = ea; | |
USE_CYCLES(count<<CYC_MOVEM_L); | |
} | |
void m68k_op_movem_32_er_ai(void) | |
{ | |
uint i = 0; | |
uint register_list = OPER_I_16(); | |
uint ea = EA_AY_AI_32(); | |
uint count = 0; | |
for(; i < 16; i++) | |
if(register_list & (1 << i)) | |
{ | |
REG_DA[i] = m68ki_read_32(ea); | |
ea += 4; | |
count++; | |
} | |
USE_CYCLES(count<<CYC_MOVEM_L); | |
} | |
void m68k_op_movem_32_er_di(void) | |
{ | |
uint i = 0; | |
uint register_list = OPER_I_16(); | |
uint ea = EA_AY_DI_32(); | |
uint count = 0; | |
for(; i < 16; i++) | |
if(register_list & (1 << i)) | |
{ | |
REG_DA[i] = m68ki_read_32(ea); | |
ea += 4; | |
count++; | |
} | |
USE_CYCLES(count<<CYC_MOVEM_L); | |
} | |
void m68k_op_movem_32_er_ix(void) | |
{ | |
uint i = 0; | |
uint register_list = OPER_I_16(); | |
uint ea = EA_AY_IX_32(); | |
uint count = 0; | |
for(; i < 16; i++) | |
if(register_list & (1 << i)) | |
{ | |
REG_DA[i] = m68ki_read_32(ea); | |
ea += 4; | |
count++; | |
} | |
USE_CYCLES(count<<CYC_MOVEM_L); | |
} | |
void m68k_op_movem_32_er_aw(void) | |
{ | |
uint i = 0; | |
uint register_list = OPER_I_16(); | |
uint ea = EA_AW_32(); | |
uint count = 0; | |
for(; i < 16; i++) | |
if(register_list & (1 << i)) | |
{ | |
REG_DA[i] = m68ki_read_32(ea); | |
ea += 4; | |
count++; | |
} | |
USE_CYCLES(count<<CYC_MOVEM_L); | |
} | |
void m68k_op_movem_32_er_al(void) | |
{ | |
uint i = 0; | |
uint register_list = OPER_I_16(); | |
uint ea = EA_AL_32(); | |
uint count = 0; | |
for(; i < 16; i++) | |
if(register_list & (1 << i)) | |
{ | |
REG_DA[i] = m68ki_read_32(ea); | |
ea += 4; | |
count++; | |
} | |
USE_CYCLES(count<<CYC_MOVEM_L); | |
} | |
void m68k_op_movem_32_er_pcdi(void) | |
{ | |
uint i = 0; | |
uint register_list = OPER_I_16(); | |
uint ea = EA_PCDI_32(); | |
uint count = 0; | |
for(; i < 16; i++) | |
if(register_list & (1 << i)) | |
{ | |
REG_DA[i] = m68ki_read_32(ea); | |
ea += 4; | |
count++; | |
} | |
USE_CYCLES(count<<CYC_MOVEM_L); | |
} | |
void m68k_op_movem_32_er_pcix(void) | |
{ | |
uint i = 0; | |
uint register_list = OPER_I_16(); | |
uint ea = EA_PCIX_32(); | |
uint count = 0; | |
for(; i < 16; i++) | |
if(register_list & (1 << i)) | |
{ | |
REG_DA[i] = m68ki_read_32(ea); | |
ea += 4; | |
count++; | |
} | |
USE_CYCLES(count<<CYC_MOVEM_L); | |
} | |
void m68k_op_movep_16_re(void) | |
{ | |
uint ea = EA_AY_DI_16(); | |
uint src = DX; | |
m68ki_write_8(ea, MASK_OUT_ABOVE_8(src >> 8)); | |
m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src)); | |
} | |
void m68k_op_movep_32_re(void) | |
{ | |
uint ea = EA_AY_DI_32(); | |
uint src = DX; | |
m68ki_write_8(ea, MASK_OUT_ABOVE_8(src >> 24)); | |
m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src >> 16)); | |
m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src >> 8)); | |
m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src)); | |
} | |
void m68k_op_movep_16_er(void) | |
{ | |
uint ea = EA_AY_DI_16(); | |
uint* r_dst = &DX; | |
*r_dst = MASK_OUT_BELOW_16(*r_dst) | ((m68ki_read_8(ea) << 8) + m68ki_read_8(ea + 2)); | |
} | |
void m68k_op_movep_32_er(void) | |
{ | |
uint ea = EA_AY_DI_32(); | |
DX = (m68ki_read_8(ea) << 24) + (m68ki_read_8(ea + 2) << 16) | |
+ (m68ki_read_8(ea + 4) << 8) + m68ki_read_8(ea + 6); | |
} | |
void m68k_op_moves_8_ai(void) | |
{ | |
if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) | |
{ | |
if(FLAG_S) | |
{ | |
uint word2 = OPER_I_16(); | |
uint ea = EA_AY_AI_8(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
if(BIT_B(word2)) /* Register to memory */ | |
{ | |
m68ki_write_8_fc(ea, REG_DFC, MASK_OUT_ABOVE_8(REG_DA[(word2 >> 12) & 15])); | |
return; | |
} | |
if(BIT_F(word2)) /* Memory to address register */ | |
{ | |
REG_A[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc(ea, REG_SFC)); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
/* Memory to data register */ | |
REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D[(word2 >> 12) & 7]) | m68ki_read_8_fc(ea, REG_SFC); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
return; | |
} | |
m68ki_exception_illegal(); | |
} | |
void m68k_op_moves_8_pi(void) | |
{ | |
if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) | |
{ | |
if(FLAG_S) | |
{ | |
uint word2 = OPER_I_16(); | |
uint ea = EA_AY_PI_8(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
if(BIT_B(word2)) /* Register to memory */ | |
{ | |
m68ki_write_8_fc(ea, REG_DFC, MASK_OUT_ABOVE_8(REG_DA[(word2 >> 12) & 15])); | |
return; | |
} | |
if(BIT_F(word2)) /* Memory to address register */ | |
{ | |
REG_A[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc(ea, REG_SFC)); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
/* Memory to data register */ | |
REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D[(word2 >> 12) & 7]) | m68ki_read_8_fc(ea, REG_SFC); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
return; | |
} | |
m68ki_exception_illegal(); | |
} | |
void m68k_op_moves_8_pi7(void) | |
{ | |
if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) | |
{ | |
if(FLAG_S) | |
{ | |
uint word2 = OPER_I_16(); | |
uint ea = EA_A7_PI_8(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
if(BIT_B(word2)) /* Register to memory */ | |
{ | |
m68ki_write_8_fc(ea, REG_DFC, MASK_OUT_ABOVE_8(REG_DA[(word2 >> 12) & 15])); | |
return; | |
} | |
if(BIT_F(word2)) /* Memory to address register */ | |
{ | |
REG_A[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc(ea, REG_SFC)); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
/* Memory to data register */ | |
REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D[(word2 >> 12) & 7]) | m68ki_read_8_fc(ea, REG_SFC); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
return; | |
} | |
m68ki_exception_illegal(); | |
} | |
void m68k_op_moves_8_pd(void) | |
{ | |
if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) | |
{ | |
if(FLAG_S) | |
{ | |
uint word2 = OPER_I_16(); | |
uint ea = EA_AY_PD_8(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
if(BIT_B(word2)) /* Register to memory */ | |
{ | |
m68ki_write_8_fc(ea, REG_DFC, MASK_OUT_ABOVE_8(REG_DA[(word2 >> 12) & 15])); | |
return; | |
} | |
if(BIT_F(word2)) /* Memory to address register */ | |
{ | |
REG_A[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc(ea, REG_SFC)); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
/* Memory to data register */ | |
REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D[(word2 >> 12) & 7]) | m68ki_read_8_fc(ea, REG_SFC); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
return; | |
} | |
m68ki_exception_illegal(); | |
} | |
void m68k_op_moves_8_pd7(void) | |
{ | |
if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) | |
{ | |
if(FLAG_S) | |
{ | |
uint word2 = OPER_I_16(); | |
uint ea = EA_A7_PD_8(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
if(BIT_B(word2)) /* Register to memory */ | |
{ | |
m68ki_write_8_fc(ea, REG_DFC, MASK_OUT_ABOVE_8(REG_DA[(word2 >> 12) & 15])); | |
return; | |
} | |
if(BIT_F(word2)) /* Memory to address register */ | |
{ | |
REG_A[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc(ea, REG_SFC)); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
/* Memory to data register */ | |
REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D[(word2 >> 12) & 7]) | m68ki_read_8_fc(ea, REG_SFC); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
return; | |
} | |
m68ki_exception_illegal(); | |
} | |
void m68k_op_moves_8_di(void) | |
{ | |
if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) | |
{ | |
if(FLAG_S) | |
{ | |
uint word2 = OPER_I_16(); | |
uint ea = EA_AY_DI_8(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
if(BIT_B(word2)) /* Register to memory */ | |
{ | |
m68ki_write_8_fc(ea, REG_DFC, MASK_OUT_ABOVE_8(REG_DA[(word2 >> 12) & 15])); | |
return; | |
} | |
if(BIT_F(word2)) /* Memory to address register */ | |
{ | |
REG_A[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc(ea, REG_SFC)); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
/* Memory to data register */ | |
REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D[(word2 >> 12) & 7]) | m68ki_read_8_fc(ea, REG_SFC); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
return; | |
} | |
m68ki_exception_illegal(); | |
} | |
void m68k_op_moves_8_ix(void) | |
{ | |
if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) | |
{ | |
if(FLAG_S) | |
{ | |
uint word2 = OPER_I_16(); | |
uint ea = EA_AY_IX_8(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
if(BIT_B(word2)) /* Register to memory */ | |
{ | |
m68ki_write_8_fc(ea, REG_DFC, MASK_OUT_ABOVE_8(REG_DA[(word2 >> 12) & 15])); | |
return; | |
} | |
if(BIT_F(word2)) /* Memory to address register */ | |
{ | |
REG_A[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc(ea, REG_SFC)); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
/* Memory to data register */ | |
REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D[(word2 >> 12) & 7]) | m68ki_read_8_fc(ea, REG_SFC); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
return; | |
} | |
m68ki_exception_illegal(); | |
} | |
void m68k_op_moves_8_aw(void) | |
{ | |
if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) | |
{ | |
if(FLAG_S) | |
{ | |
uint word2 = OPER_I_16(); | |
uint ea = EA_AW_8(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
if(BIT_B(word2)) /* Register to memory */ | |
{ | |
m68ki_write_8_fc(ea, REG_DFC, MASK_OUT_ABOVE_8(REG_DA[(word2 >> 12) & 15])); | |
return; | |
} | |
if(BIT_F(word2)) /* Memory to address register */ | |
{ | |
REG_A[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc(ea, REG_SFC)); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
/* Memory to data register */ | |
REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D[(word2 >> 12) & 7]) | m68ki_read_8_fc(ea, REG_SFC); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
return; | |
} | |
m68ki_exception_illegal(); | |
} | |
void m68k_op_moves_8_al(void) | |
{ | |
if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) | |
{ | |
if(FLAG_S) | |
{ | |
uint word2 = OPER_I_16(); | |
uint ea = EA_AL_8(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
if(BIT_B(word2)) /* Register to memory */ | |
{ | |
m68ki_write_8_fc(ea, REG_DFC, MASK_OUT_ABOVE_8(REG_DA[(word2 >> 12) & 15])); | |
return; | |
} | |
if(BIT_F(word2)) /* Memory to address register */ | |
{ | |
REG_A[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc(ea, REG_SFC)); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
/* Memory to data register */ | |
REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D[(word2 >> 12) & 7]) | m68ki_read_8_fc(ea, REG_SFC); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
return; | |
} | |
m68ki_exception_illegal(); | |
} | |
void m68k_op_moves_16_ai(void) | |
{ | |
if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) | |
{ | |
if(FLAG_S) | |
{ | |
uint word2 = OPER_I_16(); | |
uint ea = EA_AY_AI_16(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
if(BIT_B(word2)) /* Register to memory */ | |
{ | |
m68ki_write_16_fc(ea, REG_DFC, MASK_OUT_ABOVE_16(REG_DA[(word2 >> 12) & 15])); | |
return; | |
} | |
if(BIT_F(word2)) /* Memory to address register */ | |
{ | |
REG_A[(word2 >> 12) & 7] = MAKE_INT_16(m68ki_read_16_fc(ea, REG_SFC)); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
/* Memory to data register */ | |
REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_16(REG_D[(word2 >> 12) & 7]) | m68ki_read_16_fc(ea, REG_SFC); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
return; | |
} | |
m68ki_exception_illegal(); | |
} | |
void m68k_op_moves_16_pi(void) | |
{ | |
if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) | |
{ | |
if(FLAG_S) | |
{ | |
uint word2 = OPER_I_16(); | |
uint ea = EA_AY_PI_16(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
if(BIT_B(word2)) /* Register to memory */ | |
{ | |
m68ki_write_16_fc(ea, REG_DFC, MASK_OUT_ABOVE_16(REG_DA[(word2 >> 12) & 15])); | |
return; | |
} | |
if(BIT_F(word2)) /* Memory to address register */ | |
{ | |
REG_A[(word2 >> 12) & 7] = MAKE_INT_16(m68ki_read_16_fc(ea, REG_SFC)); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
/* Memory to data register */ | |
REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_16(REG_D[(word2 >> 12) & 7]) | m68ki_read_16_fc(ea, REG_SFC); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
return; | |
} | |
m68ki_exception_illegal(); | |
} | |
void m68k_op_moves_16_pd(void) | |
{ | |
if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) | |
{ | |
if(FLAG_S) | |
{ | |
uint word2 = OPER_I_16(); | |
uint ea = EA_AY_PD_16(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
if(BIT_B(word2)) /* Register to memory */ | |
{ | |
m68ki_write_16_fc(ea, REG_DFC, MASK_OUT_ABOVE_16(REG_DA[(word2 >> 12) & 15])); | |
return; | |
} | |
if(BIT_F(word2)) /* Memory to address register */ | |
{ | |
REG_A[(word2 >> 12) & 7] = MAKE_INT_16(m68ki_read_16_fc(ea, REG_SFC)); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
/* Memory to data register */ | |
REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_16(REG_D[(word2 >> 12) & 7]) | m68ki_read_16_fc(ea, REG_SFC); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
return; | |
} | |
m68ki_exception_illegal(); | |
} | |
void m68k_op_moves_16_di(void) | |
{ | |
if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) | |
{ | |
if(FLAG_S) | |
{ | |
uint word2 = OPER_I_16(); | |
uint ea = EA_AY_DI_16(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
if(BIT_B(word2)) /* Register to memory */ | |
{ | |
m68ki_write_16_fc(ea, REG_DFC, MASK_OUT_ABOVE_16(REG_DA[(word2 >> 12) & 15])); | |
return; | |
} | |
if(BIT_F(word2)) /* Memory to address register */ | |
{ | |
REG_A[(word2 >> 12) & 7] = MAKE_INT_16(m68ki_read_16_fc(ea, REG_SFC)); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
/* Memory to data register */ | |
REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_16(REG_D[(word2 >> 12) & 7]) | m68ki_read_16_fc(ea, REG_SFC); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
return; | |
} | |
m68ki_exception_illegal(); | |
} | |
void m68k_op_moves_16_ix(void) | |
{ | |
if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) | |
{ | |
if(FLAG_S) | |
{ | |
uint word2 = OPER_I_16(); | |
uint ea = EA_AY_IX_16(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
if(BIT_B(word2)) /* Register to memory */ | |
{ | |
m68ki_write_16_fc(ea, REG_DFC, MASK_OUT_ABOVE_16(REG_DA[(word2 >> 12) & 15])); | |
return; | |
} | |
if(BIT_F(word2)) /* Memory to address register */ | |
{ | |
REG_A[(word2 >> 12) & 7] = MAKE_INT_16(m68ki_read_16_fc(ea, REG_SFC)); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
/* Memory to data register */ | |
REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_16(REG_D[(word2 >> 12) & 7]) | m68ki_read_16_fc(ea, REG_SFC); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
return; | |
} | |
m68ki_exception_illegal(); | |
} | |
void m68k_op_moves_16_aw(void) | |
{ | |
if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) | |
{ | |
if(FLAG_S) | |
{ | |
uint word2 = OPER_I_16(); | |
uint ea = EA_AW_16(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
if(BIT_B(word2)) /* Register to memory */ | |
{ | |
m68ki_write_16_fc(ea, REG_DFC, MASK_OUT_ABOVE_16(REG_DA[(word2 >> 12) & 15])); | |
return; | |
} | |
if(BIT_F(word2)) /* Memory to address register */ | |
{ | |
REG_A[(word2 >> 12) & 7] = MAKE_INT_16(m68ki_read_16_fc(ea, REG_SFC)); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
/* Memory to data register */ | |
REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_16(REG_D[(word2 >> 12) & 7]) | m68ki_read_16_fc(ea, REG_SFC); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
return; | |
} | |
m68ki_exception_illegal(); | |
} | |
void m68k_op_moves_16_al(void) | |
{ | |
if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) | |
{ | |
if(FLAG_S) | |
{ | |
uint word2 = OPER_I_16(); | |
uint ea = EA_AL_16(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
if(BIT_B(word2)) /* Register to memory */ | |
{ | |
m68ki_write_16_fc(ea, REG_DFC, MASK_OUT_ABOVE_16(REG_DA[(word2 >> 12) & 15])); | |
return; | |
} | |
if(BIT_F(word2)) /* Memory to address register */ | |
{ | |
REG_A[(word2 >> 12) & 7] = MAKE_INT_16(m68ki_read_16_fc(ea, REG_SFC)); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
/* Memory to data register */ | |
REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_16(REG_D[(word2 >> 12) & 7]) | m68ki_read_16_fc(ea, REG_SFC); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
return; | |
} | |
m68ki_exception_illegal(); | |
} | |
void m68k_op_moves_32_ai(void) | |
{ | |
if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) | |
{ | |
if(FLAG_S) | |
{ | |
uint word2 = OPER_I_16(); | |
uint ea = EA_AY_AI_32(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
if(BIT_B(word2)) /* Register to memory */ | |
{ | |
m68ki_write_32_fc(ea, REG_DFC, REG_DA[(word2 >> 12) & 15]); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
/* Memory to register */ | |
REG_DA[(word2 >> 12) & 15] = m68ki_read_32_fc(ea, REG_SFC); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
return; | |
} | |
m68ki_exception_illegal(); | |
} | |
void m68k_op_moves_32_pi(void) | |
{ | |
if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) | |
{ | |
if(FLAG_S) | |
{ | |
uint word2 = OPER_I_16(); | |
uint ea = EA_AY_PI_32(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
if(BIT_B(word2)) /* Register to memory */ | |
{ | |
m68ki_write_32_fc(ea, REG_DFC, REG_DA[(word2 >> 12) & 15]); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
/* Memory to register */ | |
REG_DA[(word2 >> 12) & 15] = m68ki_read_32_fc(ea, REG_SFC); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
return; | |
} | |
m68ki_exception_illegal(); | |
} | |
void m68k_op_moves_32_pd(void) | |
{ | |
if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) | |
{ | |
if(FLAG_S) | |
{ | |
uint word2 = OPER_I_16(); | |
uint ea = EA_AY_PD_32(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
if(BIT_B(word2)) /* Register to memory */ | |
{ | |
m68ki_write_32_fc(ea, REG_DFC, REG_DA[(word2 >> 12) & 15]); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
/* Memory to register */ | |
REG_DA[(word2 >> 12) & 15] = m68ki_read_32_fc(ea, REG_SFC); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
return; | |
} | |
m68ki_exception_illegal(); | |
} | |
void m68k_op_moves_32_di(void) | |
{ | |
if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) | |
{ | |
if(FLAG_S) | |
{ | |
uint word2 = OPER_I_16(); | |
uint ea = EA_AY_DI_32(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
if(BIT_B(word2)) /* Register to memory */ | |
{ | |
m68ki_write_32_fc(ea, REG_DFC, REG_DA[(word2 >> 12) & 15]); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
/* Memory to register */ | |
REG_DA[(word2 >> 12) & 15] = m68ki_read_32_fc(ea, REG_SFC); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
return; | |
} | |
m68ki_exception_illegal(); | |
} | |
void m68k_op_moves_32_ix(void) | |
{ | |
if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) | |
{ | |
if(FLAG_S) | |
{ | |
uint word2 = OPER_I_16(); | |
uint ea = EA_AY_IX_32(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
if(BIT_B(word2)) /* Register to memory */ | |
{ | |
m68ki_write_32_fc(ea, REG_DFC, REG_DA[(word2 >> 12) & 15]); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
/* Memory to register */ | |
REG_DA[(word2 >> 12) & 15] = m68ki_read_32_fc(ea, REG_SFC); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
return; | |
} | |
m68ki_exception_illegal(); | |
} | |
void m68k_op_moves_32_aw(void) | |
{ | |
if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) | |
{ | |
if(FLAG_S) | |
{ | |
uint word2 = OPER_I_16(); | |
uint ea = EA_AW_32(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
if(BIT_B(word2)) /* Register to memory */ | |
{ | |
m68ki_write_32_fc(ea, REG_DFC, REG_DA[(word2 >> 12) & 15]); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
/* Memory to register */ | |
REG_DA[(word2 >> 12) & 15] = m68ki_read_32_fc(ea, REG_SFC); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
return; | |
} | |
m68ki_exception_illegal(); | |
} | |
void m68k_op_moves_32_al(void) | |
{ | |
if(CPU_TYPE_IS_010_PLUS(CPU_TYPE)) | |
{ | |
if(FLAG_S) | |
{ | |
uint word2 = OPER_I_16(); | |
uint ea = EA_AL_32(); | |
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */ | |
if(BIT_B(word2)) /* Register to memory */ | |
{ | |
m68ki_write_32_fc(ea, REG_DFC, REG_DA[(word2 >> 12) & 15]); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
/* Memory to register */ | |
REG_DA[(word2 >> 12) & 15] = m68ki_read_32_fc(ea, REG_SFC); | |
if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE)) | |
USE_CYCLES(2); | |
return; | |
} | |
m68ki_exception_privilege_violation(); | |
return; | |
} | |
m68ki_exception_illegal(); | |
} | |
void m68k_op_moveq_32(void) | |
{ | |
uint res = DX = MAKE_INT_8(MASK_OUT_ABOVE_8(REG_IR)); | |
FLAG_N = NFLAG_32(res); | |
FLAG_Z = res; | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_muls_16_d(void) | |
{ | |
uint* r_dst = &DX; | |
uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(DY) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst))); | |
*r_dst = res; | |
FLAG_Z = res; | |
FLAG_N = NFLAG_32(res); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_muls_16_ai(void) | |
{ | |
uint* r_dst = &DX; | |
uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(OPER_AY_AI_16()) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst))); | |
*r_dst = res; | |
FLAG_Z = res; | |
FLAG_N = NFLAG_32(res); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_muls_16_pi(void) | |
{ | |
uint* r_dst = &DX; | |
uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(OPER_AY_PI_16()) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst))); | |
*r_dst = res; | |
FLAG_Z = res; | |
FLAG_N = NFLAG_32(res); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_muls_16_pd(void) | |
{ | |
uint* r_dst = &DX; | |
uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(OPER_AY_PD_16()) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst))); | |
*r_dst = res; | |
FLAG_Z = res; | |
FLAG_N = NFLAG_32(res); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_muls_16_di(void) | |
{ | |
uint* r_dst = &DX; | |
uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(OPER_AY_DI_16()) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst))); | |
*r_dst = res; | |
FLAG_Z = res; | |
FLAG_N = NFLAG_32(res); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_muls_16_ix(void) | |
{ | |
uint* r_dst = &DX; | |
uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(OPER_AY_IX_16()) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst))); | |
*r_dst = res; | |
FLAG_Z = res; | |
FLAG_N = NFLAG_32(res); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_muls_16_aw(void) | |
{ | |
uint* r_dst = &DX; | |
uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(OPER_AW_16()) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst))); | |
*r_dst = res; | |
FLAG_Z = res; | |
FLAG_N = NFLAG_32(res); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_muls_16_al(void) | |
{ | |
uint* r_dst = &DX; | |
uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(OPER_AL_16()) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst))); | |
*r_dst = res; | |
FLAG_Z = res; | |
FLAG_N = NFLAG_32(res); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_muls_16_pcdi(void) | |
{ | |
uint* r_dst = &DX; | |
uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(OPER_PCDI_16()) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst))); | |
*r_dst = res; | |
FLAG_Z = res; | |
FLAG_N = NFLAG_32(res); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_muls_16_pcix(void) | |
{ | |
uint* r_dst = &DX; | |
uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(OPER_PCIX_16()) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst))); | |
*r_dst = res; | |
FLAG_Z = res; | |
FLAG_N = NFLAG_32(res); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_muls_16_i(void) | |
{ | |
uint* r_dst = &DX; | |
uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(OPER_I_16()) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst))); | |
*r_dst = res; | |
FLAG_Z = res; | |
FLAG_N = NFLAG_32(res); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_mulu_16_d(void) | |
{ | |
uint* r_dst = &DX; | |
uint res = MASK_OUT_ABOVE_16(DY) * MASK_OUT_ABOVE_16(*r_dst); | |
*r_dst = res; | |
FLAG_Z = res; | |
FLAG_N = NFLAG_32(res); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_mulu_16_ai(void) | |
{ | |
uint* r_dst = &DX; | |
uint res = OPER_AY_AI_16() * MASK_OUT_ABOVE_16(*r_dst); | |
*r_dst = res; | |
FLAG_Z = res; | |
FLAG_N = NFLAG_32(res); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_mulu_16_pi(void) | |
{ | |
uint* r_dst = &DX; | |
uint res = OPER_AY_PI_16() * MASK_OUT_ABOVE_16(*r_dst); | |
*r_dst = res; | |
FLAG_Z = res; | |
FLAG_N = NFLAG_32(res); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_mulu_16_pd(void) | |
{ | |
uint* r_dst = &DX; | |
uint res = OPER_AY_PD_16() * MASK_OUT_ABOVE_16(*r_dst); | |
*r_dst = res; | |
FLAG_Z = res; | |
FLAG_N = NFLAG_32(res); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_mulu_16_di(void) | |
{ | |
uint* r_dst = &DX; | |
uint res = OPER_AY_DI_16() * MASK_OUT_ABOVE_16(*r_dst); | |
*r_dst = res; | |
FLAG_Z = res; | |
FLAG_N = NFLAG_32(res); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_mulu_16_ix(void) | |
{ | |
uint* r_dst = &DX; | |
uint res = OPER_AY_IX_16() * MASK_OUT_ABOVE_16(*r_dst); | |
*r_dst = res; | |
FLAG_Z = res; | |
FLAG_N = NFLAG_32(res); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_mulu_16_aw(void) | |
{ | |
uint* r_dst = &DX; | |
uint res = OPER_AW_16() * MASK_OUT_ABOVE_16(*r_dst); | |
*r_dst = res; | |
FLAG_Z = res; | |
FLAG_N = NFLAG_32(res); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_mulu_16_al(void) | |
{ | |
uint* r_dst = &DX; | |
uint res = OPER_AL_16() * MASK_OUT_ABOVE_16(*r_dst); | |
*r_dst = res; | |
FLAG_Z = res; | |
FLAG_N = NFLAG_32(res); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_mulu_16_pcdi(void) | |
{ | |
uint* r_dst = &DX; | |
uint res = OPER_PCDI_16() * MASK_OUT_ABOVE_16(*r_dst); | |
*r_dst = res; | |
FLAG_Z = res; | |
FLAG_N = NFLAG_32(res); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_mulu_16_pcix(void) | |
{ | |
uint* r_dst = &DX; | |
uint res = OPER_PCIX_16() * MASK_OUT_ABOVE_16(*r_dst); | |
*r_dst = res; | |
FLAG_Z = res; | |
FLAG_N = NFLAG_32(res); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_mulu_16_i(void) | |
{ | |
uint* r_dst = &DX; | |
uint res = OPER_I_16() * MASK_OUT_ABOVE_16(*r_dst); | |
*r_dst = res; | |
FLAG_Z = res; | |
FLAG_N = NFLAG_32(res); | |
FLAG_V = VFLAG_CLEAR; | |
FLAG_C = CFLAG_CLEAR; | |
} | |
void m68k_op_mull_32_d(void) | |
{ | |
#if M68K_USE_64_BIT | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint64 src = DY; | |
uint64 dst = REG_D[(word2 >> 12) & 7]; | |
uint64 res; | |
FLAG_C = CFLAG_CLEAR; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
res = (sint64)((sint32)src) * (sint64)((sint32)dst); | |
if(!BIT_A(word2)) | |
{ | |
FLAG_Z = MASK_OUT_ABOVE_32(res); | |
FLAG_N = (uint)(NFLAG_32(res)); | |
FLAG_V = ((sint64)res != (sint32)res)<<7; | |
REG_D[(word2 >> 12) & 7] = FLAG_Z; | |
return; | |
} | |
FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); | |
FLAG_N = NFLAG_64(res); | |
FLAG_V = VFLAG_CLEAR; | |
REG_D[word2 & 7] = (res >> 32); | |
REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); | |
return; | |
} | |
res = src * dst; | |
if(!BIT_A(word2)) | |
{ | |
FLAG_Z = MASK_OUT_ABOVE_32(res); | |
FLAG_N = (uint)(NFLAG_32(res)); | |
FLAG_V = (res > 0xffffffff)<<7; | |
REG_D[(word2 >> 12) & 7] = FLAG_Z; | |
return; | |
} | |
FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); | |
FLAG_N = NFLAG_64(res); | |
FLAG_V = VFLAG_CLEAR; | |
REG_D[word2 & 7] = (res >> 32); | |
REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); | |
return; | |
} | |
m68ki_exception_illegal(); | |
#else | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint src = DY; | |
uint dst = REG_D[(word2 >> 12) & 7]; | |
uint neg = GET_MSB_32(src ^ dst); | |
uint src1; | |
uint src2; | |
uint dst1; | |
uint dst2; | |
uint r1; | |
uint r2; | |
uint r3; | |
uint r4; | |
uint lo; | |
uint hi; | |
FLAG_C = CFLAG_CLEAR; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
if(GET_MSB_32(src)) | |
src = (uint)MASK_OUT_ABOVE_32(-(sint)src); | |
if(GET_MSB_32(dst)) | |
dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst); | |
} | |
src1 = MASK_OUT_ABOVE_16(src); | |
src2 = src>>16; | |
dst1 = MASK_OUT_ABOVE_16(dst); | |
dst2 = dst>>16; | |
r1 = src1 * dst1; | |
r2 = src1 * dst2; | |
r3 = src2 * dst1; | |
r4 = src2 * dst2; | |
lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16); | |
hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16); | |
if(BIT_B(word2) && neg) | |
{ | |
hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0)); | |
lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo); | |
} | |
if(BIT_A(word2)) | |
{ | |
REG_D[word2 & 7] = hi; | |
REG_D[(word2 >> 12) & 7] = lo; | |
FLAG_N = NFLAG_32(hi); | |
FLAG_Z = hi | lo; | |
FLAG_V = VFLAG_CLEAR; | |
return; | |
} | |
REG_D[(word2 >> 12) & 7] = lo; | |
FLAG_N = NFLAG_32(lo); | |
FLAG_Z = lo; | |
if(BIT_B(word2)) | |
FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7; | |
else | |
FLAG_V = (hi != 0) << 7; | |
return; | |
} | |
m68ki_exception_illegal(); | |
#endif | |
} | |
void m68k_op_mull_32_ai(void) | |
{ | |
#if M68K_USE_64_BIT | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint64 src = OPER_AY_AI_32(); | |
uint64 dst = REG_D[(word2 >> 12) & 7]; | |
uint64 res; | |
FLAG_C = CFLAG_CLEAR; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
res = (sint64)((sint32)src) * (sint64)((sint32)dst); | |
if(!BIT_A(word2)) | |
{ | |
FLAG_Z = MASK_OUT_ABOVE_32(res); | |
FLAG_N = (uint)(NFLAG_32(res)); | |
FLAG_V = ((sint64)res != (sint32)res)<<7; | |
REG_D[(word2 >> 12) & 7] = FLAG_Z; | |
return; | |
} | |
FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); | |
FLAG_N = NFLAG_64(res); | |
FLAG_V = VFLAG_CLEAR; | |
REG_D[word2 & 7] = (res >> 32); | |
REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); | |
return; | |
} | |
res = src * dst; | |
if(!BIT_A(word2)) | |
{ | |
FLAG_Z = MASK_OUT_ABOVE_32(res); | |
FLAG_N = (uint)(NFLAG_32(res)); | |
FLAG_V = (res > 0xffffffff)<<7; | |
REG_D[(word2 >> 12) & 7] = FLAG_Z; | |
return; | |
} | |
FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); | |
FLAG_N = NFLAG_64(res); | |
FLAG_V = VFLAG_CLEAR; | |
REG_D[word2 & 7] = (res >> 32); | |
REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); | |
return; | |
} | |
m68ki_exception_illegal(); | |
#else | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint src = OPER_AY_AI_32(); | |
uint dst = REG_D[(word2 >> 12) & 7]; | |
uint neg = GET_MSB_32(src ^ dst); | |
uint src1; | |
uint src2; | |
uint dst1; | |
uint dst2; | |
uint r1; | |
uint r2; | |
uint r3; | |
uint r4; | |
uint lo; | |
uint hi; | |
FLAG_C = CFLAG_CLEAR; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
if(GET_MSB_32(src)) | |
src = (uint)MASK_OUT_ABOVE_32(-(sint)src); | |
if(GET_MSB_32(dst)) | |
dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst); | |
} | |
src1 = MASK_OUT_ABOVE_16(src); | |
src2 = src>>16; | |
dst1 = MASK_OUT_ABOVE_16(dst); | |
dst2 = dst>>16; | |
r1 = src1 * dst1; | |
r2 = src1 * dst2; | |
r3 = src2 * dst1; | |
r4 = src2 * dst2; | |
lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16); | |
hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16); | |
if(BIT_B(word2) && neg) | |
{ | |
hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0)); | |
lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo); | |
} | |
if(BIT_A(word2)) | |
{ | |
REG_D[word2 & 7] = hi; | |
REG_D[(word2 >> 12) & 7] = lo; | |
FLAG_N = NFLAG_32(hi); | |
FLAG_Z = hi | lo; | |
FLAG_V = VFLAG_CLEAR; | |
return; | |
} | |
REG_D[(word2 >> 12) & 7] = lo; | |
FLAG_N = NFLAG_32(lo); | |
FLAG_Z = lo; | |
if(BIT_B(word2)) | |
FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7; | |
else | |
FLAG_V = (hi != 0) << 7; | |
return; | |
} | |
m68ki_exception_illegal(); | |
#endif | |
} | |
void m68k_op_mull_32_pi(void) | |
{ | |
#if M68K_USE_64_BIT | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint64 src = OPER_AY_PI_32(); | |
uint64 dst = REG_D[(word2 >> 12) & 7]; | |
uint64 res; | |
FLAG_C = CFLAG_CLEAR; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
res = (sint64)((sint32)src) * (sint64)((sint32)dst); | |
if(!BIT_A(word2)) | |
{ | |
FLAG_Z = MASK_OUT_ABOVE_32(res); | |
FLAG_N = (uint)(NFLAG_32(res)); | |
FLAG_V = ((sint64)res != (sint32)res)<<7; | |
REG_D[(word2 >> 12) & 7] = FLAG_Z; | |
return; | |
} | |
FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); | |
FLAG_N = NFLAG_64(res); | |
FLAG_V = VFLAG_CLEAR; | |
REG_D[word2 & 7] = (res >> 32); | |
REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); | |
return; | |
} | |
res = src * dst; | |
if(!BIT_A(word2)) | |
{ | |
FLAG_Z = MASK_OUT_ABOVE_32(res); | |
FLAG_N = (uint)(NFLAG_32(res)); | |
FLAG_V = (res > 0xffffffff)<<7; | |
REG_D[(word2 >> 12) & 7] = FLAG_Z; | |
return; | |
} | |
FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); | |
FLAG_N = NFLAG_64(res); | |
FLAG_V = VFLAG_CLEAR; | |
REG_D[word2 & 7] = (res >> 32); | |
REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); | |
return; | |
} | |
m68ki_exception_illegal(); | |
#else | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint src = OPER_AY_PI_32(); | |
uint dst = REG_D[(word2 >> 12) & 7]; | |
uint neg = GET_MSB_32(src ^ dst); | |
uint src1; | |
uint src2; | |
uint dst1; | |
uint dst2; | |
uint r1; | |
uint r2; | |
uint r3; | |
uint r4; | |
uint lo; | |
uint hi; | |
FLAG_C = CFLAG_CLEAR; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
if(GET_MSB_32(src)) | |
src = (uint)MASK_OUT_ABOVE_32(-(sint)src); | |
if(GET_MSB_32(dst)) | |
dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst); | |
} | |
src1 = MASK_OUT_ABOVE_16(src); | |
src2 = src>>16; | |
dst1 = MASK_OUT_ABOVE_16(dst); | |
dst2 = dst>>16; | |
r1 = src1 * dst1; | |
r2 = src1 * dst2; | |
r3 = src2 * dst1; | |
r4 = src2 * dst2; | |
lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16); | |
hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16); | |
if(BIT_B(word2) && neg) | |
{ | |
hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0)); | |
lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo); | |
} | |
if(BIT_A(word2)) | |
{ | |
REG_D[word2 & 7] = hi; | |
REG_D[(word2 >> 12) & 7] = lo; | |
FLAG_N = NFLAG_32(hi); | |
FLAG_Z = hi | lo; | |
FLAG_V = VFLAG_CLEAR; | |
return; | |
} | |
REG_D[(word2 >> 12) & 7] = lo; | |
FLAG_N = NFLAG_32(lo); | |
FLAG_Z = lo; | |
if(BIT_B(word2)) | |
FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7; | |
else | |
FLAG_V = (hi != 0) << 7; | |
return; | |
} | |
m68ki_exception_illegal(); | |
#endif | |
} | |
void m68k_op_mull_32_pd(void) | |
{ | |
#if M68K_USE_64_BIT | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint64 src = OPER_AY_PD_32(); | |
uint64 dst = REG_D[(word2 >> 12) & 7]; | |
uint64 res; | |
FLAG_C = CFLAG_CLEAR; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
res = (sint64)((sint32)src) * (sint64)((sint32)dst); | |
if(!BIT_A(word2)) | |
{ | |
FLAG_Z = MASK_OUT_ABOVE_32(res); | |
FLAG_N = (uint)(NFLAG_32(res)); | |
FLAG_V = ((sint64)res != (sint32)res)<<7; | |
REG_D[(word2 >> 12) & 7] = FLAG_Z; | |
return; | |
} | |
FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); | |
FLAG_N = NFLAG_64(res); | |
FLAG_V = VFLAG_CLEAR; | |
REG_D[word2 & 7] = (res >> 32); | |
REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); | |
return; | |
} | |
res = src * dst; | |
if(!BIT_A(word2)) | |
{ | |
FLAG_Z = MASK_OUT_ABOVE_32(res); | |
FLAG_N = (uint)(NFLAG_32(res)); | |
FLAG_V = (res > 0xffffffff)<<7; | |
REG_D[(word2 >> 12) & 7] = FLAG_Z; | |
return; | |
} | |
FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); | |
FLAG_N = NFLAG_64(res); | |
FLAG_V = VFLAG_CLEAR; | |
REG_D[word2 & 7] = (res >> 32); | |
REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); | |
return; | |
} | |
m68ki_exception_illegal(); | |
#else | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint src = OPER_AY_PD_32(); | |
uint dst = REG_D[(word2 >> 12) & 7]; | |
uint neg = GET_MSB_32(src ^ dst); | |
uint src1; | |
uint src2; | |
uint dst1; | |
uint dst2; | |
uint r1; | |
uint r2; | |
uint r3; | |
uint r4; | |
uint lo; | |
uint hi; | |
FLAG_C = CFLAG_CLEAR; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
if(GET_MSB_32(src)) | |
src = (uint)MASK_OUT_ABOVE_32(-(sint)src); | |
if(GET_MSB_32(dst)) | |
dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst); | |
} | |
src1 = MASK_OUT_ABOVE_16(src); | |
src2 = src>>16; | |
dst1 = MASK_OUT_ABOVE_16(dst); | |
dst2 = dst>>16; | |
r1 = src1 * dst1; | |
r2 = src1 * dst2; | |
r3 = src2 * dst1; | |
r4 = src2 * dst2; | |
lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16); | |
hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16); | |
if(BIT_B(word2) && neg) | |
{ | |
hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0)); | |
lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo); | |
} | |
if(BIT_A(word2)) | |
{ | |
REG_D[word2 & 7] = hi; | |
REG_D[(word2 >> 12) & 7] = lo; | |
FLAG_N = NFLAG_32(hi); | |
FLAG_Z = hi | lo; | |
FLAG_V = VFLAG_CLEAR; | |
return; | |
} | |
REG_D[(word2 >> 12) & 7] = lo; | |
FLAG_N = NFLAG_32(lo); | |
FLAG_Z = lo; | |
if(BIT_B(word2)) | |
FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7; | |
else | |
FLAG_V = (hi != 0) << 7; | |
return; | |
} | |
m68ki_exception_illegal(); | |
#endif | |
} | |
void m68k_op_mull_32_di(void) | |
{ | |
#if M68K_USE_64_BIT | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint64 src = OPER_AY_DI_32(); | |
uint64 dst = REG_D[(word2 >> 12) & 7]; | |
uint64 res; | |
FLAG_C = CFLAG_CLEAR; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
res = (sint64)((sint32)src) * (sint64)((sint32)dst); | |
if(!BIT_A(word2)) | |
{ | |
FLAG_Z = MASK_OUT_ABOVE_32(res); | |
FLAG_N = (uint)(NFLAG_32(res)); | |
FLAG_V = ((sint64)res != (sint32)res)<<7; | |
REG_D[(word2 >> 12) & 7] = FLAG_Z; | |
return; | |
} | |
FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); | |
FLAG_N = NFLAG_64(res); | |
FLAG_V = VFLAG_CLEAR; | |
REG_D[word2 & 7] = (res >> 32); | |
REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); | |
return; | |
} | |
res = src * dst; | |
if(!BIT_A(word2)) | |
{ | |
FLAG_Z = MASK_OUT_ABOVE_32(res); | |
FLAG_N = (uint)(NFLAG_32(res)); | |
FLAG_V = (res > 0xffffffff)<<7; | |
REG_D[(word2 >> 12) & 7] = FLAG_Z; | |
return; | |
} | |
FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); | |
FLAG_N = NFLAG_64(res); | |
FLAG_V = VFLAG_CLEAR; | |
REG_D[word2 & 7] = (res >> 32); | |
REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); | |
return; | |
} | |
m68ki_exception_illegal(); | |
#else | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint src = OPER_AY_DI_32(); | |
uint dst = REG_D[(word2 >> 12) & 7]; | |
uint neg = GET_MSB_32(src ^ dst); | |
uint src1; | |
uint src2; | |
uint dst1; | |
uint dst2; | |
uint r1; | |
uint r2; | |
uint r3; | |
uint r4; | |
uint lo; | |
uint hi; | |
FLAG_C = CFLAG_CLEAR; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
if(GET_MSB_32(src)) | |
src = (uint)MASK_OUT_ABOVE_32(-(sint)src); | |
if(GET_MSB_32(dst)) | |
dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst); | |
} | |
src1 = MASK_OUT_ABOVE_16(src); | |
src2 = src>>16; | |
dst1 = MASK_OUT_ABOVE_16(dst); | |
dst2 = dst>>16; | |
r1 = src1 * dst1; | |
r2 = src1 * dst2; | |
r3 = src2 * dst1; | |
r4 = src2 * dst2; | |
lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16); | |
hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16); | |
if(BIT_B(word2) && neg) | |
{ | |
hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0)); | |
lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo); | |
} | |
if(BIT_A(word2)) | |
{ | |
REG_D[word2 & 7] = hi; | |
REG_D[(word2 >> 12) & 7] = lo; | |
FLAG_N = NFLAG_32(hi); | |
FLAG_Z = hi | lo; | |
FLAG_V = VFLAG_CLEAR; | |
return; | |
} | |
REG_D[(word2 >> 12) & 7] = lo; | |
FLAG_N = NFLAG_32(lo); | |
FLAG_Z = lo; | |
if(BIT_B(word2)) | |
FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7; | |
else | |
FLAG_V = (hi != 0) << 7; | |
return; | |
} | |
m68ki_exception_illegal(); | |
#endif | |
} | |
void m68k_op_mull_32_ix(void) | |
{ | |
#if M68K_USE_64_BIT | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint64 src = OPER_AY_IX_32(); | |
uint64 dst = REG_D[(word2 >> 12) & 7]; | |
uint64 res; | |
FLAG_C = CFLAG_CLEAR; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
res = (sint64)((sint32)src) * (sint64)((sint32)dst); | |
if(!BIT_A(word2)) | |
{ | |
FLAG_Z = MASK_OUT_ABOVE_32(res); | |
FLAG_N = (uint)(NFLAG_32(res)); | |
FLAG_V = ((sint64)res != (sint32)res)<<7; | |
REG_D[(word2 >> 12) & 7] = FLAG_Z; | |
return; | |
} | |
FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); | |
FLAG_N = NFLAG_64(res); | |
FLAG_V = VFLAG_CLEAR; | |
REG_D[word2 & 7] = (res >> 32); | |
REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); | |
return; | |
} | |
res = src * dst; | |
if(!BIT_A(word2)) | |
{ | |
FLAG_Z = MASK_OUT_ABOVE_32(res); | |
FLAG_N = (uint)(NFLAG_32(res)); | |
FLAG_V = (res > 0xffffffff)<<7; | |
REG_D[(word2 >> 12) & 7] = FLAG_Z; | |
return; | |
} | |
FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); | |
FLAG_N = NFLAG_64(res); | |
FLAG_V = VFLAG_CLEAR; | |
REG_D[word2 & 7] = (res >> 32); | |
REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); | |
return; | |
} | |
m68ki_exception_illegal(); | |
#else | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint src = OPER_AY_IX_32(); | |
uint dst = REG_D[(word2 >> 12) & 7]; | |
uint neg = GET_MSB_32(src ^ dst); | |
uint src1; | |
uint src2; | |
uint dst1; | |
uint dst2; | |
uint r1; | |
uint r2; | |
uint r3; | |
uint r4; | |
uint lo; | |
uint hi; | |
FLAG_C = CFLAG_CLEAR; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
if(GET_MSB_32(src)) | |
src = (uint)MASK_OUT_ABOVE_32(-(sint)src); | |
if(GET_MSB_32(dst)) | |
dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst); | |
} | |
src1 = MASK_OUT_ABOVE_16(src); | |
src2 = src>>16; | |
dst1 = MASK_OUT_ABOVE_16(dst); | |
dst2 = dst>>16; | |
r1 = src1 * dst1; | |
r2 = src1 * dst2; | |
r3 = src2 * dst1; | |
r4 = src2 * dst2; | |
lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16); | |
hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16); | |
if(BIT_B(word2) && neg) | |
{ | |
hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0)); | |
lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo); | |
} | |
if(BIT_A(word2)) | |
{ | |
REG_D[word2 & 7] = hi; | |
REG_D[(word2 >> 12) & 7] = lo; | |
FLAG_N = NFLAG_32(hi); | |
FLAG_Z = hi | lo; | |
FLAG_V = VFLAG_CLEAR; | |
return; | |
} | |
REG_D[(word2 >> 12) & 7] = lo; | |
FLAG_N = NFLAG_32(lo); | |
FLAG_Z = lo; | |
if(BIT_B(word2)) | |
FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7; | |
else | |
FLAG_V = (hi != 0) << 7; | |
return; | |
} | |
m68ki_exception_illegal(); | |
#endif | |
} | |
void m68k_op_mull_32_aw(void) | |
{ | |
#if M68K_USE_64_BIT | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint64 src = OPER_AW_32(); | |
uint64 dst = REG_D[(word2 >> 12) & 7]; | |
uint64 res; | |
FLAG_C = CFLAG_CLEAR; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
res = (sint64)((sint32)src) * (sint64)((sint32)dst); | |
if(!BIT_A(word2)) | |
{ | |
FLAG_Z = MASK_OUT_ABOVE_32(res); | |
FLAG_N = (uint)(NFLAG_32(res)); | |
FLAG_V = ((sint64)res != (sint32)res)<<7; | |
REG_D[(word2 >> 12) & 7] = FLAG_Z; | |
return; | |
} | |
FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); | |
FLAG_N = NFLAG_64(res); | |
FLAG_V = VFLAG_CLEAR; | |
REG_D[word2 & 7] = (res >> 32); | |
REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); | |
return; | |
} | |
res = src * dst; | |
if(!BIT_A(word2)) | |
{ | |
FLAG_Z = MASK_OUT_ABOVE_32(res); | |
FLAG_N = (uint)(NFLAG_32(res)); | |
FLAG_V = (res > 0xffffffff)<<7; | |
REG_D[(word2 >> 12) & 7] = FLAG_Z; | |
return; | |
} | |
FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); | |
FLAG_N = NFLAG_64(res); | |
FLAG_V = VFLAG_CLEAR; | |
REG_D[word2 & 7] = (res >> 32); | |
REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); | |
return; | |
} | |
m68ki_exception_illegal(); | |
#else | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint src = OPER_AW_32(); | |
uint dst = REG_D[(word2 >> 12) & 7]; | |
uint neg = GET_MSB_32(src ^ dst); | |
uint src1; | |
uint src2; | |
uint dst1; | |
uint dst2; | |
uint r1; | |
uint r2; | |
uint r3; | |
uint r4; | |
uint lo; | |
uint hi; | |
FLAG_C = CFLAG_CLEAR; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
if(GET_MSB_32(src)) | |
src = (uint)MASK_OUT_ABOVE_32(-(sint)src); | |
if(GET_MSB_32(dst)) | |
dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst); | |
} | |
src1 = MASK_OUT_ABOVE_16(src); | |
src2 = src>>16; | |
dst1 = MASK_OUT_ABOVE_16(dst); | |
dst2 = dst>>16; | |
r1 = src1 * dst1; | |
r2 = src1 * dst2; | |
r3 = src2 * dst1; | |
r4 = src2 * dst2; | |
lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16); | |
hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16); | |
if(BIT_B(word2) && neg) | |
{ | |
hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0)); | |
lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo); | |
} | |
if(BIT_A(word2)) | |
{ | |
REG_D[word2 & 7] = hi; | |
REG_D[(word2 >> 12) & 7] = lo; | |
FLAG_N = NFLAG_32(hi); | |
FLAG_Z = hi | lo; | |
FLAG_V = VFLAG_CLEAR; | |
return; | |
} | |
REG_D[(word2 >> 12) & 7] = lo; | |
FLAG_N = NFLAG_32(lo); | |
FLAG_Z = lo; | |
if(BIT_B(word2)) | |
FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7; | |
else | |
FLAG_V = (hi != 0) << 7; | |
return; | |
} | |
m68ki_exception_illegal(); | |
#endif | |
} | |
void m68k_op_mull_32_al(void) | |
{ | |
#if M68K_USE_64_BIT | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint64 src = OPER_AL_32(); | |
uint64 dst = REG_D[(word2 >> 12) & 7]; | |
uint64 res; | |
FLAG_C = CFLAG_CLEAR; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
res = (sint64)((sint32)src) * (sint64)((sint32)dst); | |
if(!BIT_A(word2)) | |
{ | |
FLAG_Z = MASK_OUT_ABOVE_32(res); | |
FLAG_N = (uint)(NFLAG_32(res)); | |
FLAG_V = ((sint64)res != (sint32)res)<<7; | |
REG_D[(word2 >> 12) & 7] = FLAG_Z; | |
return; | |
} | |
FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); | |
FLAG_N = NFLAG_64(res); | |
FLAG_V = VFLAG_CLEAR; | |
REG_D[word2 & 7] = (res >> 32); | |
REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); | |
return; | |
} | |
res = src * dst; | |
if(!BIT_A(word2)) | |
{ | |
FLAG_Z = MASK_OUT_ABOVE_32(res); | |
FLAG_N = (uint)(NFLAG_32(res)); | |
FLAG_V = (res > 0xffffffff)<<7; | |
REG_D[(word2 >> 12) & 7] = FLAG_Z; | |
return; | |
} | |
FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); | |
FLAG_N = NFLAG_64(res); | |
FLAG_V = VFLAG_CLEAR; | |
REG_D[word2 & 7] = (res >> 32); | |
REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); | |
return; | |
} | |
m68ki_exception_illegal(); | |
#else | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint src = OPER_AL_32(); | |
uint dst = REG_D[(word2 >> 12) & 7]; | |
uint neg = GET_MSB_32(src ^ dst); | |
uint src1; | |
uint src2; | |
uint dst1; | |
uint dst2; | |
uint r1; | |
uint r2; | |
uint r3; | |
uint r4; | |
uint lo; | |
uint hi; | |
FLAG_C = CFLAG_CLEAR; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
if(GET_MSB_32(src)) | |
src = (uint)MASK_OUT_ABOVE_32(-(sint)src); | |
if(GET_MSB_32(dst)) | |
dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst); | |
} | |
src1 = MASK_OUT_ABOVE_16(src); | |
src2 = src>>16; | |
dst1 = MASK_OUT_ABOVE_16(dst); | |
dst2 = dst>>16; | |
r1 = src1 * dst1; | |
r2 = src1 * dst2; | |
r3 = src2 * dst1; | |
r4 = src2 * dst2; | |
lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16); | |
hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16); | |
if(BIT_B(word2) && neg) | |
{ | |
hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0)); | |
lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo); | |
} | |
if(BIT_A(word2)) | |
{ | |
REG_D[word2 & 7] = hi; | |
REG_D[(word2 >> 12) & 7] = lo; | |
FLAG_N = NFLAG_32(hi); | |
FLAG_Z = hi | lo; | |
FLAG_V = VFLAG_CLEAR; | |
return; | |
} | |
REG_D[(word2 >> 12) & 7] = lo; | |
FLAG_N = NFLAG_32(lo); | |
FLAG_Z = lo; | |
if(BIT_B(word2)) | |
FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7; | |
else | |
FLAG_V = (hi != 0) << 7; | |
return; | |
} | |
m68ki_exception_illegal(); | |
#endif | |
} | |
void m68k_op_mull_32_pcdi(void) | |
{ | |
#if M68K_USE_64_BIT | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint64 src = OPER_PCDI_32(); | |
uint64 dst = REG_D[(word2 >> 12) & 7]; | |
uint64 res; | |
FLAG_C = CFLAG_CLEAR; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
res = (sint64)((sint32)src) * (sint64)((sint32)dst); | |
if(!BIT_A(word2)) | |
{ | |
FLAG_Z = MASK_OUT_ABOVE_32(res); | |
FLAG_N = (uint)(NFLAG_32(res)); | |
FLAG_V = ((sint64)res != (sint32)res)<<7; | |
REG_D[(word2 >> 12) & 7] = FLAG_Z; | |
return; | |
} | |
FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); | |
FLAG_N = NFLAG_64(res); | |
FLAG_V = VFLAG_CLEAR; | |
REG_D[word2 & 7] = (res >> 32); | |
REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); | |
return; | |
} | |
res = src * dst; | |
if(!BIT_A(word2)) | |
{ | |
FLAG_Z = MASK_OUT_ABOVE_32(res); | |
FLAG_N = (uint)(NFLAG_32(res)); | |
FLAG_V = (res > 0xffffffff)<<7; | |
REG_D[(word2 >> 12) & 7] = FLAG_Z; | |
return; | |
} | |
FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); | |
FLAG_N = NFLAG_64(res); | |
FLAG_V = VFLAG_CLEAR; | |
REG_D[word2 & 7] = (res >> 32); | |
REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); | |
return; | |
} | |
m68ki_exception_illegal(); | |
#else | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint src = OPER_PCDI_32(); | |
uint dst = REG_D[(word2 >> 12) & 7]; | |
uint neg = GET_MSB_32(src ^ dst); | |
uint src1; | |
uint src2; | |
uint dst1; | |
uint dst2; | |
uint r1; | |
uint r2; | |
uint r3; | |
uint r4; | |
uint lo; | |
uint hi; | |
FLAG_C = CFLAG_CLEAR; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
if(GET_MSB_32(src)) | |
src = (uint)MASK_OUT_ABOVE_32(-(sint)src); | |
if(GET_MSB_32(dst)) | |
dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst); | |
} | |
src1 = MASK_OUT_ABOVE_16(src); | |
src2 = src>>16; | |
dst1 = MASK_OUT_ABOVE_16(dst); | |
dst2 = dst>>16; | |
r1 = src1 * dst1; | |
r2 = src1 * dst2; | |
r3 = src2 * dst1; | |
r4 = src2 * dst2; | |
lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16); | |
hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16); | |
if(BIT_B(word2) && neg) | |
{ | |
hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0)); | |
lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo); | |
} | |
if(BIT_A(word2)) | |
{ | |
REG_D[word2 & 7] = hi; | |
REG_D[(word2 >> 12) & 7] = lo; | |
FLAG_N = NFLAG_32(hi); | |
FLAG_Z = hi | lo; | |
FLAG_V = VFLAG_CLEAR; | |
return; | |
} | |
REG_D[(word2 >> 12) & 7] = lo; | |
FLAG_N = NFLAG_32(lo); | |
FLAG_Z = lo; | |
if(BIT_B(word2)) | |
FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7; | |
else | |
FLAG_V = (hi != 0) << 7; | |
return; | |
} | |
m68ki_exception_illegal(); | |
#endif | |
} | |
void m68k_op_mull_32_pcix(void) | |
{ | |
#if M68K_USE_64_BIT | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint64 src = OPER_PCIX_32(); | |
uint64 dst = REG_D[(word2 >> 12) & 7]; | |
uint64 res; | |
FLAG_C = CFLAG_CLEAR; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
res = (sint64)((sint32)src) * (sint64)((sint32)dst); | |
if(!BIT_A(word2)) | |
{ | |
FLAG_Z = MASK_OUT_ABOVE_32(res); | |
FLAG_N = (uint)(NFLAG_32(res)); | |
FLAG_V = ((sint64)res != (sint32)res)<<7; | |
REG_D[(word2 >> 12) & 7] = FLAG_Z; | |
return; | |
} | |
FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); | |
FLAG_N = NFLAG_64(res); | |
FLAG_V = VFLAG_CLEAR; | |
REG_D[word2 & 7] = (res >> 32); | |
REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); | |
return; | |
} | |
res = src * dst; | |
if(!BIT_A(word2)) | |
{ | |
FLAG_Z = MASK_OUT_ABOVE_32(res); | |
FLAG_N = (uint)(NFLAG_32(res)); | |
FLAG_V = (res > 0xffffffff)<<7; | |
REG_D[(word2 >> 12) & 7] = FLAG_Z; | |
return; | |
} | |
FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); | |
FLAG_N = NFLAG_64(res); | |
FLAG_V = VFLAG_CLEAR; | |
REG_D[word2 & 7] = (res >> 32); | |
REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); | |
return; | |
} | |
m68ki_exception_illegal(); | |
#else | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint src = OPER_PCIX_32(); | |
uint dst = REG_D[(word2 >> 12) & 7]; | |
uint neg = GET_MSB_32(src ^ dst); | |
uint src1; | |
uint src2; | |
uint dst1; | |
uint dst2; | |
uint r1; | |
uint r2; | |
uint r3; | |
uint r4; | |
uint lo; | |
uint hi; | |
FLAG_C = CFLAG_CLEAR; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
if(GET_MSB_32(src)) | |
src = (uint)MASK_OUT_ABOVE_32(-(sint)src); | |
if(GET_MSB_32(dst)) | |
dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst); | |
} | |
src1 = MASK_OUT_ABOVE_16(src); | |
src2 = src>>16; | |
dst1 = MASK_OUT_ABOVE_16(dst); | |
dst2 = dst>>16; | |
r1 = src1 * dst1; | |
r2 = src1 * dst2; | |
r3 = src2 * dst1; | |
r4 = src2 * dst2; | |
lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16); | |
hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16); | |
if(BIT_B(word2) && neg) | |
{ | |
hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0)); | |
lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo); | |
} | |
if(BIT_A(word2)) | |
{ | |
REG_D[word2 & 7] = hi; | |
REG_D[(word2 >> 12) & 7] = lo; | |
FLAG_N = NFLAG_32(hi); | |
FLAG_Z = hi | lo; | |
FLAG_V = VFLAG_CLEAR; | |
return; | |
} | |
REG_D[(word2 >> 12) & 7] = lo; | |
FLAG_N = NFLAG_32(lo); | |
FLAG_Z = lo; | |
if(BIT_B(word2)) | |
FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7; | |
else | |
FLAG_V = (hi != 0) << 7; | |
return; | |
} | |
m68ki_exception_illegal(); | |
#endif | |
} | |
void m68k_op_mull_32_i(void) | |
{ | |
#if M68K_USE_64_BIT | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint64 src = OPER_I_32(); | |
uint64 dst = REG_D[(word2 >> 12) & 7]; | |
uint64 res; | |
FLAG_C = CFLAG_CLEAR; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
res = (sint64)((sint32)src) * (sint64)((sint32)dst); | |
if(!BIT_A(word2)) | |
{ | |
FLAG_Z = MASK_OUT_ABOVE_32(res); | |
FLAG_N = (uint)(NFLAG_32(res)); | |
FLAG_V = ((sint64)res != (sint32)res)<<7; | |
REG_D[(word2 >> 12) & 7] = FLAG_Z; | |
return; | |
} | |
FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); | |
FLAG_N = NFLAG_64(res); | |
FLAG_V = VFLAG_CLEAR; | |
REG_D[word2 & 7] = (res >> 32); | |
REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); | |
return; | |
} | |
res = src * dst; | |
if(!BIT_A(word2)) | |
{ | |
FLAG_Z = MASK_OUT_ABOVE_32(res); | |
FLAG_N = (uint)(NFLAG_32(res)); | |
FLAG_V = (res > 0xffffffff)<<7; | |
REG_D[(word2 >> 12) & 7] = FLAG_Z; | |
return; | |
} | |
FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32); | |
FLAG_N = NFLAG_64(res); | |
FLAG_V = VFLAG_CLEAR; | |
REG_D[word2 & 7] = (res >> 32); | |
REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res); | |
return; | |
} | |
m68ki_exception_illegal(); | |
#else | |
if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE)) | |
{ | |
uint word2 = OPER_I_16(); | |
uint src = OPER_I_32(); | |
uint dst = REG_D[(word2 >> 12) & 7]; | |
uint neg = GET_MSB_32(src ^ dst); | |
uint src1; | |
uint src2; | |
uint dst1; | |
uint dst2; | |
uint r1; | |
uint r2; | |
uint r3; | |
uint r4; | |
uint lo; | |
uint hi; | |
FLAG_C = CFLAG_CLEAR; | |
if(BIT_B(word2)) /* signed */ | |
{ | |
if(GET_MSB_32(src)) | |
src = (uint)MASK_OUT_ABOVE_32(-(sint)src); | |
if(GET_MSB_32(dst)) | |
dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst); | |
} | |
src1 = MASK_OUT_ABOVE_16(src); | |
src2 = src>>16; | |
dst1 = MASK_OUT_ABOVE_16(dst); | |
dst2 = dst>>16; | |
r1 = src1 * dst1; | |
r2 = src1 * dst2; | |
r3 = src2 * dst1; | |
r4 = src2 * dst2; | |
lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16); | |
hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16); | |
if(BIT_B(word2) && neg) | |
{ | |
hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0)); | |
lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo); | |
} | |
if(BIT_A(word2)) | |
{ | |
REG_D[word2 & 7] = hi; | |
REG_D[(word2 >> 12) & 7] = lo; | |
FLAG_N = NFLAG_32(hi); | |
FLAG_Z = hi | lo; | |
FLAG_V = VFLAG_CLEAR; | |
return; | |
} | |
REG_D[(word2 >> 12) & 7] = lo; | |
FLAG_N = NFLAG_32(lo); | |
FLAG_Z = lo; | |
if(BIT_B(word2)) | |
FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7; | |
else | |
FLAG_V = (hi != 0) << 7; | |
return; | |
} | |
m68ki_exception_illegal(); | |
#endif | |
} | |
/* ======================================================================== */ | |
/* ============================== END OF FILE ============================= */ | |
/* ======================================================================== */ | |