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| <title>XTEST — Test If In Transactional Execution </title></head> |
| <body> |
| <h1>XTEST — Test If In Transactional Execution</h1> |
| <table> |
| <tr> |
| <th>Opcode/Instruction</th> |
| <th>Op/En</th> |
| <th>64/32bit Mode Support</th> |
| <th>CPUID Feature Flag</th> |
| <th>Description</th></tr> |
| <tr> |
| <td> |
| <p>0F 01 D6</p> |
| <p>XTEST</p></td> |
| <td>A</td> |
| <td>V/V</td> |
| <td>HLE or RTM</td> |
| <td>Test if executing in a transactional region</td></tr></table> |
| <h3>Instruction Operand Encoding</h3> |
| <table> |
| <tr> |
| <td>Op/En</td> |
| <td>Operand 1</td> |
| <td>Operand2</td> |
| <td>Operand3</td> |
| <td>Operand4</td></tr> |
| <tr> |
| <td>A</td> |
| <td>NA</td> |
| <td>NA</td> |
| <td>NA</td> |
| <td>NA</td></tr></table> |
| <h2>Description</h2> |
| <p>The XTEST instruction queries the transactional execution status. If the instruction executes inside a transaction-ally executing RTM region or a transactionally executing HLE region, then the ZF flag is cleared, else it is set.</p> |
| <h2>Operation</h2> |
| <p><strong>XTEST</strong></p> |
| <pre>IF (RTM_ACTIVE = 1 OR HLE_ACTIVE = 1) |
| THEN |
| ZF ← 0 |
| ELSE |
| ZF ← 1 |
| FI;</pre> |
| <h2>Flags Affected</h2> |
| <p>The ZF flag is cleared if the instruction is executed transactionally; otherwise it is set to 1. The CF, OF, SF, PF, and AF, flags are cleared.</p> |
| <h2>Intel C/C++ Compiler Intrinsic Equivalent</h2> |
| <p>XTEST:</p> |
| <p>int _xtest( void );</p> |
| <h2>SIMD Floating-Point Exceptions</h2> |
| <p>None</p> |
| <h2>Other Exceptions</h2> |
| <table class="exception-table"> |
| <tr> |
| <td>#UD</td> |
| <td> |
| <p>CPUID.(EAX=7, ECX=0):HLE[bit 4] = 0 and CPUID.(EAX=7, ECX=0):RTM[bit 11] = 0.</p> |
| <p>If LOCK or 66H or F2H or F3H prefix is used.</p></td></tr></table></body></html> |