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| <title>VERR/VERW—Verify a Segment for Reading or Writing </title></head> |
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| <h1>VERR/VERW—Verify a Segment for Reading or Writing</h1> |
| <table> |
| <tr> |
| <th>Opcode</th> |
| <th>Instruction</th> |
| <th>Op/En</th> |
| <th>64-Bit Mode</th> |
| <th>Compat/Leg Mode</th> |
| <th>Description</th></tr> |
| <tr> |
| <td>0F 00 /4</td> |
| <td>VERR <em>r/m16</em></td> |
| <td>M</td> |
| <td>Valid</td> |
| <td>Valid</td> |
| <td>Set ZF=1 if segment specified with <em>r/m16</em> can be read.</td></tr> |
| <tr> |
| <td>0F 00 /5</td> |
| <td>VERW<em> r/m16</em></td> |
| <td>M</td> |
| <td>Valid</td> |
| <td>Valid</td> |
| <td>Set ZF=1 if segment specified with <em>r/m16</em> can be written.</td></tr></table> |
| <h3>Instruction Operand Encoding</h3> |
| <table> |
| <tr> |
| <td>Op/En</td> |
| <td>Operand 1</td> |
| <td>Operand 2</td> |
| <td>Operand 3</td> |
| <td>Operand 4</td></tr> |
| <tr> |
| <td>M</td> |
| <td>ModRM:r/m (r)</td> |
| <td>NA</td> |
| <td>NA</td> |
| <td>NA</td></tr></table> |
| <h2>Description</h2> |
| <p>Verifies whether the code or data segment specified with the source operand is readable (VERR) or writable (VERW) from the current privilege level (CPL). The source operand is a 16-bit register or a memory location that contains the segment selector for the segment to be verified. If the segment is accessible and readable (VERR) or writable (VERW), the ZF flag is set; otherwise, the ZF flag is cleared. Code segments are never verified as writable. This check cannot be performed on system segments.</p> |
| <p>To set the ZF flag, the following conditions must be met:</p> |
| <p>The validation performed is the same as is performed when a segment selector is loaded into the DS, ES, FS, or GS register, and the indicated access (read or write) is performed. The segment selector's value cannot result in a protection exception, enabling the software to anticipate possible segment access problems.</p> |
| <p>This instruction’s operation is the same in non-64-bit modes and 64-bit mode. The operand size is fixed at 16 bits.</p> |
| <h2>Operation</h2> |
| <pre>IF SRC(Offset) > (GDTR(Limit) or (LDTR(Limit)) |
| THEN ZF ← 0; FI; |
| Read segment descriptor; |
| IF SegmentDescriptor(DescriptorType) = 0 (* System segment *) |
| or (SegmentDescriptor(Type) ≠ conforming code segment) |
| and (CPL > DPL) or (RPL > DPL) |
| THEN |
| ZF ← 0; |
| ELSE |
| IF ((Instruction = VERR) and (Segment readable)) |
| or ((Instruction = VERW) and (Segment writable)) |
| THEN |
| ZF ← 1; |
| FI; |
| FI;</pre> |
| <h2>Flags Affected</h2> |
| <p>The ZF flag is set to 1 if the segment is accessible and readable (VERR) or writable (VERW); otherwise, it is set to 0.</p> |
| <h2>Protected Mode Exceptions</h2> |
| <p>The only exceptions generated for these instructions are those related to illegal addressing of the source operand.</p> |
| <table class="exception-table"> |
| <tr> |
| <td>#GP(0)</td> |
| <td> |
| <p>If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.</p> |
| <p>If the DS, ES, FS, or GS register is used to access memory and it contains a NULL segment selector.</p></td></tr> |
| <tr> |
| <td>#SS(0)</td> |
| <td>If a memory operand effective address is outside the SS segment limit.</td></tr> |
| <tr> |
| <td>#PF(fault-code)</td> |
| <td>If a page fault occurs.</td></tr> |
| <tr> |
| <td>#AC(0)</td> |
| <td>If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3.</td></tr> |
| <tr> |
| <td>#UD</td> |
| <td>If the LOCK prefix is used.</td></tr></table> |
| <h2>Real-Address Mode Exceptions</h2> |
| <table class="exception-table"> |
| <tr> |
| <td>#UD</td> |
| <td> |
| <p>The VERR and VERW instructions are not recognized in real-address mode.</p> |
| <p>If the LOCK prefix is used.</p></td></tr></table> |
| <h2>Virtual-8086 Mode Exceptions</h2> |
| <table class="exception-table"> |
| <tr> |
| <td>#UD</td> |
| <td> |
| <p>The VERR and VERW instructions are not recognized in virtual-8086 mode.</p> |
| <p>If the LOCK prefix is used.</p></td></tr></table> |
| <h2>Compatibility Mode Exceptions</h2> |
| <p>Same exceptions as in protected mode.</p> |
| <h2>64-Bit Mode Exceptions</h2> |
| <table class="exception-table"> |
| <tr> |
| <td>#SS(0)</td> |
| <td>If a memory address referencing the SS segment is in a non-canonical form.</td></tr> |
| <tr> |
| <td>#GP(0)</td> |
| <td>If the memory address is in a non-canonical form.</td></tr> |
| <tr> |
| <td>#PF(fault-code)</td> |
| <td>If a page fault occurs.</td></tr> |
| <tr> |
| <td>#AC(0)</td> |
| <td>If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3.</td></tr> |
| <tr> |
| <td>#UD</td> |
| <td>If the LOCK prefix is used.</td></tr></table></body></html> |