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<title>IDIV—Signed Divide </title></head>
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<h1>IDIV—Signed Divide</h1>
<table>
<tr>
<th>Opcode</th>
<th>Instruction</th>
<th>Op/En</th>
<th>64-Bit Mode</th>
<th>Compat/Leg Mode</th>
<th>Description</th></tr>
<tr>
<td>F6 /7</td>
<td>IDIV <em>r/m8</em></td>
<td>M</td>
<td>Valid</td>
<td>Valid</td>
<td>Signed divide AX by <em>r/m</em>8, with result stored in: AL ← Quotient, AH ← Remainder.</td></tr>
<tr>
<td>REX + F6 /7</td>
<td>IDIV <em>r/m8*</em></td>
<td>M</td>
<td>Valid</td>
<td>N.E.</td>
<td>Signed divide AX by <em>r/m</em>8, with result stored in AL ← Quotient, AH ← Remainder.</td></tr>
<tr>
<td>F7 /7</td>
<td>IDIV <em>r/m16</em></td>
<td>M</td>
<td>Valid</td>
<td>Valid</td>
<td>Signed divide DX:AX by <em>r/m16</em>, with result stored in AX ← Quotient, DX ← Remainder.</td></tr>
<tr>
<td>F7 /7</td>
<td>IDIV <em>r/m32</em></td>
<td>M</td>
<td>Valid</td>
<td>Valid</td>
<td>Signed divide EDX:EAX by <em>r/m32</em>, with result stored in EAX ← Quotient, EDX ← Remainder.</td></tr>
<tr>
<td>REX.W + F7 /7</td>
<td>IDIV <em>r/m64</em></td>
<td>M</td>
<td>Valid</td>
<td>N.E.</td>
<td>Signed divide RDX:RAX by <em>r/m64</em>, with result stored in RAX ← Quotient, RDX ← Remainder.</td></tr></table>
<p><strong>NOTES:</strong></p>
<p>*</p>
<p>In 64-bit mode, r/m8 can not be encoded to access the following byte registers if a REX prefix is used: AH, BH, CH, DH.</p>
<h3>Instruction Operand Encoding</h3>
<table>
<tr>
<td>Op/En</td>
<td>Operand 1</td>
<td>Operand 2</td>
<td>Operand 3</td>
<td>Operand 4</td></tr>
<tr>
<td>M</td>
<td>ModRM:r/m (r)</td>
<td>NA</td>
<td>NA</td>
<td>NA</td></tr></table>
<h2>Description</h2>
<p>Divides the (signed) value in the AX, DX:AX, or EDX:EAX (dividend) by the source operand (divisor) and stores the result in the AX (AH:AL), DX:AX, or EDX:EAX registers. The source operand can be a general-purpose register or a memory location. The action of this instruction depends on the operand size (dividend/divisor).</p>
<p>Non-integral results are truncated (chopped) towards 0. The remainder is always less than the divisor in magni-tude. Overflow is indicated with the #DE (divide error) exception rather than with the CF flag.</p>
<p>In 64-bit mode, the instruction’s default operation size is 32 bits. Use of the REX.R prefix permits access to addi-tional registers (R8-R15). Use of the REX.W prefix promotes operation to 64 bits. In 64-bit mode when REX.W is applied, the instruction divides the signed value in RDX:RAX by the source operand. RAX contains a 64-bit quotient; RDX contains a 64-bit remainder.</p>
<p>See the summary chart at the beginning of this section for encoding data and limits. See Table 3-60.</p>
<h3>Table 3-60. IDIV Results</h3>
<table>
<tr>
<th>Operand Size</th>
<th>Dividend</th>
<th>Divisor</th>
<th>Quotient</th>
<th>Remainder</th>
<th>Quotient Range</th></tr>
<tr>
<td>
<p>Word/byte</p>
<p>Doubleword/word</p>
<p>Quadword/doubleword</p>
<p>Doublequadword/ quadword</p></td>
<td>
<p>AX</p>
<p>DX:AX</p>
<p>EDX:EAX</p>
<p>RDX:RAX</p></td>
<td>
<p>r/m8</p>
<p>r/m16</p>
<p>r/m32</p>
<p>r/m64</p></td>
<td>
<p>AL</p>
<p>AX</p>
<p>EAX</p>
<p>RAX</p></td>
<td>
<p>AH</p>
<p>DX</p>
<p>EDX</p>
<p>RDX</p></td>
<td>
<p>−128 to +127</p>
<p>−32,768 to +32,767</p>
<p>−2<sup>31</sup> to 2<sup>31</sup> − 1</p>
<p>−2<sup>63</sup> to 2<sup>63</sup> − 1</p></td></tr></table>
<h2>Operation</h2>
<pre>IF SRC = 0
THEN #DE; (* Divide error *)
FI;
IF OperandSize = 8 (* Word/byte operation *)
THEN
temp ← AX / SRC; (* Signed division *)
IF (temp &gt; 7FH) or (temp &lt; 80H)
(* If a positive result is greater than 7FH or a negative result is less than 80H *)
THEN #DE; (* Divide error *)
ELSE
AL ← temp;
AH ← AX SignedModulus SRC;
FI;
ELSE IF OperandSize = 16 (* Doubleword/word operation *)
THEN
temp ← DX:AX / SRC; (* Signed division *)
IF (temp &gt; 7FFFH) or (temp &lt; 8000H)
(* If a positive result is greater than 7FFFH
or a negative result is less than 8000H *)
THEN
#DE; (* Divide error *)
ELSE
AX ← temp;
DX ← DX:AX SignedModulus SRC;
FI;
FI;
ELSE IF OperandSize = 32 (* Quadword/doubleword operation *)
temp ← EDX:EAX / SRC; (* Signed division *)
IF (temp &gt; 7FFFFFFFH) or (temp &lt; 80000000H)
(* If a positive result is greater than 7FFFFFFFH
or a negative result is less than 80000000H *)
THEN
#DE; (* Divide error *)
ELSE
EAX ← temp;
EDX ← EDXE:AX SignedModulus SRC;
FI;
FI;
ELSE IF OperandSize = 64 (* Doublequadword/quadword operation *)
temp ← RDX:RAX / SRC; (* Signed division *)
IF (temp &gt; 7FFFFFFFFFFFFFFFH) or (temp &lt; 8000000000000000H)
(* If a positive result is greater than 7FFFFFFFFFFFFFFFH
or a negative result is less than 8000000000000000H *)
THEN
#DE; (* Divide error *)
ELSE
RAX ← temp;
RDX ← RDE:RAX SignedModulus SRC;
FI;
FI;
FI;</pre>
<h2>Flags Affected</h2>
<p>The CF, OF, SF, ZF, AF, and PF flags are undefined.</p>
<h2>Protected Mode Exceptions</h2>
<table class="exception-table">
<tr>
<td>#DE</td>
<td>
<p>If the source operand (divisor) is 0.</p>
<p>The signed result (quotient) is too large for the destination.</p></td></tr>
<tr>
<td>#GP(0)</td>
<td>
<p>If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.</p>
<p>If the DS, ES, FS, or GS register is used to access memory and it contains a NULL segment selector.</p></td></tr>
<tr>
<td>#SS(0)</td>
<td>If a memory operand effective address is outside the SS segment limit.</td></tr>
<tr>
<td>#PF(fault-code)</td>
<td>If a page fault occurs.</td></tr>
<tr>
<td>#AC(0)</td>
<td>If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3.</td></tr>
<tr>
<td>#UD</td>
<td>If the LOCK prefix is used.</td></tr></table>
<h2>Real-Address Mode Exceptions</h2>
<table class="exception-table">
<tr>
<td>#DE</td>
<td>
<p>If the source operand (divisor) is 0.</p>
<p>The signed result (quotient) is too large for the destination.</p></td></tr>
<tr>
<td>#GP</td>
<td>If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.</td></tr>
<tr>
<td>#SS</td>
<td>If a memory operand effective address is outside the SS segment limit.</td></tr>
<tr>
<td>#UD</td>
<td>If the LOCK prefix is used.</td></tr></table>
<h2>Virtual-8086 Mode Exceptions</h2>
<table class="exception-table">
<tr>
<td>#DE</td>
<td>
<p>If the source operand (divisor) is 0.</p>
<p>The signed result (quotient) is too large for the destination.</p></td></tr>
<tr>
<td>#GP(0)</td>
<td>If a memory operand effective address is outside the CS, DS, ES, FS, or GS segment limit.</td></tr>
<tr>
<td>#SS(0)</td>
<td>If a memory operand effective address is outside the SS segment limit.</td></tr>
<tr>
<td>#PF(fault-code)</td>
<td>If a page fault occurs.</td></tr>
<tr>
<td>#AC(0)</td>
<td>If alignment checking is enabled and an unaligned memory reference is made.</td></tr>
<tr>
<td>#UD</td>
<td>If the LOCK prefix is used.</td></tr></table>
<h2>Compatibility Mode Exceptions</h2>
<p>Same exceptions as in protected mode.</p>
<h2>64-Bit Mode Exceptions</h2>
<table class="exception-table">
<tr>
<td>#SS(0)</td>
<td>If a memory address referencing the SS segment is in a non-canonical form.</td></tr>
<tr>
<td>#GP(0)</td>
<td>If the memory address is in a non-canonical form.</td></tr>
<tr>
<td>#DE</td>
<td>
<p>If the source operand (divisor) is 0</p>
<p>If the quotient is too large for the designated register.</p></td></tr>
<tr>
<td>#PF(fault-code)</td>
<td>If a page fault occurs.</td></tr>
<tr>
<td>#AC(0)</td>
<td>If alignment checking is enabled and an unaligned memory reference is made while the current privilege level is 3.</td></tr>
<tr>
<td>#UD</td>
<td>If the LOCK prefix is used.</td></tr></table></body></html>